BitManip Task Group tech-bitmanip@lists.riscv.org

Group Description

The BitManip work group will define extensions to the Unprivileged ISA that are comprised of bit-based instructions. These extensions are intended to enable the development of code that is substantially more performant and efficient that what is possible with the base instructions. Performance testing will be conducted by compiling or hand-assembling routines and then measuring performance improvement in a RISC-V modelling environment. Where possible, all or portions of standard benchmark tests will be employed in this testing. The new instructions will include operations from one or more of the following categories: bit counts, shift/rotate, insert/extract, set/clear, permute, and logical/mask. A base extension will include commonly used functions that are simpler to implement. An extended extension will be proposed should there be instructions that provide even more performance and power savings at a cost of more complexity.

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