[riscv-CMOs:master] reported: How to discover the information of cache block size by software? #github #risv #CMOs


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[riscv-CMOs:master] New Comment on Issue #48 How to discover the information of cache block size by software?
By cmuellner:

A plausible and sensible scenario would be that upstream will support all the RVA22 extensions, plus the supported/existing HW before RVA22, plus any non-RVA22 HW with a reasonably large user base (assuming that somebody will care enough to work on the required patches).

The __builtin___clear_cache builtin is part of GCC (flush the processor's instruction cache) and needs to be implemented as JIT compilers might depend on it.

One way to solve this for all CBO sizes would be:

	ld a1, 0(riscv_cbom_block_size)
[...]
	mv a0, $start
	j 2f
3:
	$cmo_operation (a0)
	add a0, a0, a1
2:
	bltu a0, $end, 3b

That's also how Heiko's kernel patch implements the CBO support.

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