[riscv-CMOs:master] New Issue Created by AndyGlew: #15 Use cases for CMOs - collect We need to collect use cases for CMOs. Want to document. This issue to collect - brief summary up top. Add more case

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[riscv-CMOs:master] New Issue Created by AndyGlew: #16 Give CMO TG members ability to post to https://github.com/riscv/riscv-CMOs/wiki My initial work for the CMO TG was done on a GitHub wiki, and now

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[riscv-CMOs:master] New Issue Created by AndyGlew: #17 Labels for CMOs TG issues; #admin, #technical ... ? GitHub's issue tracker has "labels" that can be attached to issues. There is a small default

#technical #github #risc-v #CMOs

[riscv-CMOs:master] New Issue Created by AndyGlew: #18 Invited Talks - collect suggestions We probably need to invite some outside speakers to present at the CMOs TG meetings. Other RISC-V TGs do. We

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[riscv-CMOs:master] New Comment on Issue #16 Give CMO TG members ability to post to https://github.com/riscv/riscv-CMOs/wiki By dkruckemyer-ventana: TBD: my co-chair David Kruckemeyer should be an ass

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[riscv-CMOs:master] New Issue Created by AndyGlew: #16 Give CMO TG members ability to post to https://github.com/riscv/riscv-CMOs/wiki My initial work for the CMO TG was done on a GitHub wiki, and now

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1 New Commit: [riscv-CMOs:master] By Andy Glew (Dell ) <surfbook@...>: fbcef65102fc: Derek Williams, IBM, argument against address ranges for RISC-V CMOs Added: discussion-files/RISC_V_range

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[riscv-CMOs:master] New Comment on Issue #15 Use cases for CMOs - collect By bmcspadd-seagate: I've talked to our firmware guys about their cache management use cases. Here's what I've gathered: The t

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[riscv-CMOs:master] New Comment on Issue #18 Invited Talks - collect suggestions By dkruckemyer-ventana: Someone from the software standing committee or Platform/Profile TG to describe how Linux (and

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[riscv-CMOs:master] New Comment on Issue #15 Use cases for CMOs - collect By ubc-guy: I've used CMOs to assist coherence in hybrid systems, where some processors are coherent but accelerators are not

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[riscv-CMOs:master] New Comment on Issue #15 Use cases for CMOs - collect By AndyGlew: Another use case: changing the cacheability/memory type, e.g. via the PTEs or PMAs. It looks pretty likely that t

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1 New Commit: [riscv-CMOs:master] By AndyGlew <10249637+AndyGlew@...>: fefdcfeb9502: Create README.md Placeholder, with TBDs Added: agendas and minutes/README.md

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1 New Commit: [riscv-CMOs:master] By David Kruckemyer <47680170+dkruckemyer-ventana@...>: 6ad19e2db1c1: Add proposed charter Modified: README.md

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[riscv-CMOs:master] New Comment on Issue #15 Use cases for CMOs - collect By AndyGlew: Agreed: CMOS must ignore the cacheability attributes. That;'s not what I was talking about/ PTE.WB --> PTE.UC Bre

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1 New Commit: [riscv-CMOs:master] By AndyGlew <10249637+AndyGlew@...>: 267308c6199e: Create 2020-11-23_CMOs-TG-surrender Agenda for 11/23 meeting - text dump. not formatted Added:

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1 New Commit: [riscv-CMOs:master] By AndyGlew <10249637+AndyGlew@...>: dcc468b30f06: Rename 2020-11-23_CMOs-TG-surrender-agenda.mediawiki to 2020-11-23_CMOs-TG--agenda--surrender.

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1 New Commit: [riscv-CMOs:master] By AndyGlew <10249637+AndyGlew@...>: 32f6f9bc4ec3: Update 2020-11-23_CMOs-TG--minutes--surrender.mediawiki Modified: agendas-and-minutes/2020-11-

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[riscv-CMOs:master] New Comment on Issue #6 Consider renaming FLUSH to EVICT By jhauser-us: To evict from the instruction cache (or from any other read-only cache), will the operation be called FLUSH

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[riscv-CMOs:master] New Issue Created by dkruckemyer-ventana: #20 Does CBO.ZERO.EA need to be atomic? I know that ZERO is not strictly a CBO, but.... Does CBO.ZERO.EA need to be atomic? The most pract

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[riscv-CMOs:master] New Comment on Issue #20 Does CBO.ZERO.EA need to be atomic? By strikerdw: Opinions (probably even ones I'll agree with later on): 1) DCBZ can't reasonably be emulated in a single-

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