Updates to Github #github #CMOs #risv


tech-cmo@lists.riscv.org Integration <tech-cmo@...>
 

[riscv/riscv-CMOs] Pull request opened by dkruckemyer-ventana:

#42 Public review feedback

Notes from the public review period:

Feedback on sections 2.5.2 (Page Fault and Guest-Page Fault Exceptions) and 2.5.3 (Access Fault Exceptions): * Review feedback: Store instructions omitted from the list of permitted memory accesses that imply cache-block management and prefetch instruction permissions * Resolution: Added store instructions to load instructions and instruction fetches * Review feedback: Splitting permissions descriptions across two sections introduced ambiguity about whether permissions from address translation, PMPs, and PMAs were logically ORed or ANDed * Resolution: The two sections describing the two types of faults have been merged, and the behaviors and the priorities between the types of faults have been clarified

Feedback on Section 2.6 (Effects on Constrained LR/SC Loops): * Review feedback: Normative text describes that reservation may be cancelled on other harts but not on the same hart * Resolution: The original text did not intend to constrain or omit behaviors, so the normative text is restated to specify only the additional condition that must be added to the list of events specified in the A extension * Review feedback: Effect of prefetch instructions on reservations not clear in the specification * Resolution: The non-normative comments have been edited to reiterate that the properties of constrained LR/SC loops do not change (with the exception of the new normative text) and to add a few examples to illustrate the point

Feedback on Sections 5.1-5.7 * Review feedback: Shorten the text in the Synopsis sections * Resolution: The text in the Synopsis sections has been made more terse * Review feedback: Describe the address calculations for each instruction * Resolution: Address calculations have been added to individual instruction description sections, and general comments on addressing for each extension are provided in the text in sections 4.1-4.3; in addition, the use of x0 in the rd field to encode both HINT and immediate bits for prefetch instructions has been described more explicitly

Other updates: * Section 2.5 has been renamed “Traps” as part of merging sections 2.5.2 and 2.5.3 * Text in the introductory section of Chapter 4 (Extensions) has been distributed to the individual extension descriptions in sections 4.1-4.3


[riscv-CMOs:master] New Comment on Pull Request #42 Public review feedback
By dkruckemyer-ventana:

Next steps:

  • Merge PR
  • Generate final pdf and pdf diffs between v0.6 and v1.0


[riscv-CMOs:master] New Comment on Pull Request #42 Public review feedback
By dkruckemyer-ventana:

Next steps:

  • Merge PR
  • Generate final v1.0 pdf and pdf diffs between v0.6 and v1.0


tech-cmo@lists.riscv.org Integration <tech-cmo@...>
 

[riscv/riscv-CMOs] Pull request closed by dkruckemyer-ventana:

#42 Public review feedback

Notes from the public review period:

Feedback on sections 2.5.2 (Page Fault and Guest-Page Fault Exceptions) and 2.5.3 (Access Fault Exceptions): * Review feedback: Store instructions omitted from the list of permitted memory accesses that imply cache-block management and prefetch instruction permissions * Resolution: Added store instructions to load instructions and instruction fetches * Review feedback: Splitting permissions descriptions across two sections introduced ambiguity about whether permissions from address translation, PMPs, and PMAs were logically ORed or ANDed * Resolution: The two sections describing the two types of faults have been merged, and the behaviors and the priorities between the types of faults have been clarified

Feedback on Section 2.6 (Effects on Constrained LR/SC Loops): * Review feedback: Normative text describes that reservation may be cancelled on other harts but not on the same hart * Resolution: The original text did not intend to constrain or omit behaviors, so the normative text is restated to specify only the additional condition that must be added to the list of events specified in the A extension * Review feedback: Effect of prefetch instructions on reservations not clear in the specification * Resolution: The non-normative comments have been edited to reiterate that the properties of constrained LR/SC loops do not change (with the exception of the new normative text) and to add a few examples to illustrate the point

Feedback on Sections 5.1-5.7 * Review feedback: Shorten the text in the Synopsis sections * Resolution: The text in the Synopsis sections has been made more terse * Review feedback: Describe the address calculations for each instruction * Resolution: Address calculations have been added to individual instruction description sections, and general comments on addressing for each extension are provided in the text in sections 4.1-4.3; in addition, the use of x0 in the rd field to encode both HINT and immediate bits for prefetch instructions has been described more explicitly

Other updates: * Section 2.5 has been renamed “Traps” as part of merging sections 2.5.2 and 2.5.3 * Text in the introductory section of Chapter 4 (Extensions) has been distributed to the individual extension descriptions in sections 4.1-4.3


8 New Commits:

[riscv-CMOs:master] By David Kruckemyer <dkruckemyer@...>:
fb80eedec7f5: Update background info and doc version

Modified: Makefile
Modified: Makefile.pwsh
Modified: cmobase/background.adoc
Modified: cmobase/cmobase.adoc


[riscv-CMOs:master] By David Kruckemyer <dkruckemyer@...>:
3cdc53186b3b: Update extension and instruction descriptions

Modified: cmobase/Zicbom.adoc
Modified: cmobase/Zicbop.adoc
Modified: cmobase/Zicboz.adoc
Modified: cmobase/extensions.adoc
Modified: cmobase/insns/cbo.clean.adoc
Modified: cmobase/insns/cbo.flush.adoc
Modified: cmobase/insns/cbo.inval.adoc
Modified: cmobase/insns/cbo.zero.adoc
Modified: cmobase/insns/prefetch.i.adoc
Modified: cmobase/insns/prefetch.r.adoc
Modified: cmobase/insns/prefetch.w.adoc


[riscv-CMOs:master] By David Kruckemyer <dkruckemyer@...>:
e941c3c4eda7: Update background.adoc

clarify the permissions again

Modified: cmobase/background.adoc


[riscv-CMOs:master] By David Kruckemyer <dkruckemyer@...>:
558f8c767ffe: Update background.adoc

Updated non-normative statement on permissions

Modified: cmobase/background.adoc


[riscv-CMOs:master] By David Kruckemyer <dkruckemyer@...>:
ed1c753f524c: Update background.adoc

Fix up case where translation is valid but no access is permitted

Modified: cmobase/background.adoc


[riscv-CMOs:master] By David Kruckemyer <dkruckemyer@...>:
4eac4f723912: Update background.adoc

Update the non-normative text on LR/SC loops

Modified: cmobase/background.adoc


[riscv-CMOs:master] By David Kruckemyer <dkruckemyer@...>:
4da5e27ecc92: Create cmobase-v1.0-rc1.pdf

Added: cmobase-v1.0-rc1.pdf


[riscv-CMOs:master] By David Kruckemyer <47680170+dkruckemyer-ventana@...>:
d2f8bc1ec2b0: Merge pull request #42 from dkruckemyer-ventana/public-review-feedback

Public review feedback

Added: cmobase-v1.0-rc1.pdf
Modified: Makefile
Modified: Makefile.pwsh
Modified: cmobase/Zicbom.adoc
Modified: cmobase/Zicbop.adoc
Modified: cmobase/Zicboz.adoc
Modified: cmobase/background.adoc
Modified: cmobase/cmobase.adoc
Modified: cmobase/extensions.adoc
Modified: cmobase/insns/cbo.clean.adoc
Modified: cmobase/insns/cbo.flush.adoc
Modified: cmobase/insns/cbo.inval.adoc
Modified: cmobase/insns/cbo.zero.adoc
Modified: cmobase/insns/prefetch.i.adoc
Modified: cmobase/insns/prefetch.r.adoc
Modified: cmobase/insns/prefetch.w.adoc