Updates to Github #github #CMOs #risv
tech-cmo@lists.riscv.org Integration <tech-cmo@...>
[riscv-CMOs:master] New Comment on Issue #4 Define possible loop friendly code prefetch instructions (not currently recommended for POR, but FTR)
Closing due to lack of discussion. [riscv-CMOs:master] Issue #4 Define possible loop friendly code prefetch instructions (not currently recommended for POR, but FTR) closed by AndyGlew.
[riscv-CMOs:master] New Comment on Issue #5 DCBA
Closing due to lack of discussion. [riscv-CMOs:master] Issue #5 DCBA closed by AndyGlew.
[riscv-CMOs:master] New Comment on Issue #7 Invalidate Clean / do nothing to Dirty ?? (C-->I, D-->no change)
Closing due to lack of discussion. [riscv-CMOs:master] Issue #7 Invalidate Clean / do nothing to Dirty ?? (C-->I, D-->no change) closed by AndyGlew.
[riscv-CMOs:master] New Comment on Issue #11 THIRD QUESTION: what CMO types should actually be supported?
Closing since defined in v1.0 spec. [riscv-CMOs:master] Issue #11 THIRD QUESTION: what CMO types should actually be supported? closed by AndyGlew.
[riscv-CMOs:master] New Comment on Issue #22 Feedback on CMO Spec
Closing since I think these issues have been addressed. [riscv-CMOs:master] Issue #22 Feedback on CMO Spec closed by SanjayPatelRVI.
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tech-cmo@lists.riscv.org Integration <tech-cmo@...>
[riscv-CMOs:master] New Comment on Issue #40 encoding of prefetches impose minimum sensible granularity of cache blocks
Closing since I believe this issue has been addressed. [riscv-CMOs:master] Issue #40 encoding of prefetches impose minimum sensible granularity of cache blocks closed by jnk0le.
[riscv-CMOs:master] New Comment on Issue #18 Invited Talks - collect suggestions
Closing due to lack of discussion. [riscv-CMOs:master] Issue #18 Invited Talks - collect suggestions closed by AndyGlew.
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tech-cmo@lists.riscv.org Integration <tech-cmo@...>
[riscv-CMOs:master] New Comment on Issue #41 CBO instruction behavior when cache is disabled or when memory attribute is uncacheable
Closing since I believe the issue has been addressed. Please reopen if not. [riscv-CMOs:master] Issue #41 CBO instruction behavior when cache is disabled or when memory attribute is uncacheable closed by chuanhua.
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