Updates to Github #github #CMOs #risv


tech-cmo@lists.riscv.org Integration <tech-cmo@...>
 

[riscv-CMOs:master] New Issue Created by asb:
#47 Textual format for cbo.* asm operands - '(rs1')/'0(rs1)' vs 'rs1'

I'm about to post patches to enable MC layer support for Zicbo{m,z,p} in LLVM. One point that isn't clear is whether the cbo.* instructions should be written like e.g. cbo.clean (a0)/cbo.clean 0(a0), matching the RVA instructions that take a memory address in a register with no immediate offset, or just plain cbe.clean a0. As @aswaterman pointed out on the GCC list, there's also precedent for not having parentheses (sfence.vma).

Possibly this is outside the scope of the CMO group and something that those of us in the LLVM community just need to sync with the binutils/GCC folks on. What do you think?

CC @kito-cheng who's also been helping coordinate aligment between LLVM and GCC/binutils.


[riscv-CMOs:master] New Issue Created by asb:
#47 Textual format for cbo.* asm operands - '(rs1')/'0(rs1)' vs 'rs1'

I'm about to post patches to enable MC layer support for Zicbo{m,z,p} in LLVM. One point that isn't clear is whether the cbo.* instructions should be written like e.g. cbo.clean (a0)/cbo.clean 0(a0), matching the RVA instructions that take a memory address in a register with no immediate offset, or just plain cbe.clean a0. As @aswaterman pointed out on the binutils list, there's also precedent for not having parentheses (sfence.vma).

Possibly this is outside the scope of the CMO group and something that those of us in the LLVM community just need to sync with the binutils/GCC folks on. What do you think?

CC @kito-cheng who's also been helping coordinate aligment between LLVM and GCC/binutils.


[riscv-CMOs:master] New Issue Created by asb:
#47 Textual format for cbo.* asm operands - '(rs1')/'0(rs1)' vs 'rs1'

I'm about to post patches to enable MC layer support for Zicbo{m,z,p} in LLVM. One point that isn't clear is whether the cbo.* instructions should be written like e.g. cbo.clean (a0)/cbo.clean 0(a0), matching the A extension instructions that take a memory address in a register with no immediate offset (e.g. lr.w t0, (t1)), or just plain cbe.clean a0. As @aswaterman pointed out on the binutils list, there's also precedent for not having parentheses (sfence.vma).

Possibly this is outside the scope of the CMO group and something that those of us in the LLVM community just need to sync with the binutils/GCC folks on. What do you think?

CC @kito-cheng who's also been helping coordinate aligment between LLVM and GCC/binutils.