In this particular case, the issue is that the Smstateen spec comes later, and hasn't been addressed yet. I believe it's out of scope for Zc, it is simply noted that new state (the JVT CSR) is added so a state enable is required.

As SiLabs are actually implementing Zc right now, they are asking sensible questions about it, so we need to complete this part of the Smstateen spec.

Greg - any input on this would be appreciated.

Tariq

On Mon, 16 May 2022 at 15:47, Mark Himelstein <markhimelstein@...> wrote:

Please talk with Greg and decide.

This is why we have cross group involvement. When a spec is ratified and a TG is disbanded, the Committee has ultimate responsibility.

I have a question though. Is there learning we need to have from this? If the issue wasn't raised how would we have found this? Do we need a list of standard dependencies/interactions?

Thanks

Mark

On Mon, May 16, 2022 at 5:55 AM Tariq Kurd via lists.riscv.org <tariq.kurd=codasip.com@...> wrote:

Hi,

We have a question on github about the implementation of smstateen for Zcmt (table jump).

There's the JVT CSR which needs a state enable. The question is whether there is also a state-enable for the ISA extension.

https://github.com/riscv/riscv-code-size-reduction/issues/160

Who is responsible for the Zcmt Smstateen spec?

Thanks

Tariq

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Tariq Kurd | Lead CPU Architect | Codasip UK Design Centre | www.codasip.com

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Tariq Kurd | Lead CPU Architect | Codasip UK Design Centre | www.codasip.com