Re: [RISC-V] [tech-virt-mem] Help needed on physical address issues


Allen Baum
 

It works on virtual addresses, and when MMU is disabled, virtual=physical.  As I said, not "simply" ignored..

On Wed, Aug 10, 2022 at 7:07 AM Ved Shanbhogue <ved@...> wrote:
I think the pointer-masking extension would ignore upper bits in a virtual address - but only for the canonicality check. 
Of course, when virtual memory systems are not enabled then they are the same but I do not recall if pointer-masking
is applicable when virtual memory systems are not enabled.
regards
ved

On Wed, Aug 10, 2022 at 9:03 AM Allen Baum <allen.baum@...> wrote:
Note that the (unratified)  pointer masking extension would permit upper bits to be ignored (but not "simply" be ignored).


On Wed, Aug 10, 2022 at 5:26 AM Scott Johnson <scott.johnson@...> wrote:
Ignoring the high bits is not acceptable. It must take an access fault.

I agree the specs do not make this entirely clear.

Join tech-privileged@lists.riscv.org to automatically receive all group messages.