Re: Fast-track extension proposal for Resumable Non-Maskable Interrupts (Smrnmi)

Andrew Waterman

If these registers are allowed to be reused for other purposes (e.g. another privilege mode), then those other purposes would either require masking NMIs or would make NMIs received in that mode non-resumable.  So it would seem to run counter to the purpose of this extension.

On Wed, Oct 5, 2022 at 2:13 AM Mark Hill <mark.hill@...> wrote:

Hi Andrew,


Just one thought, this change introduces a bank of context saving registers that could also be re-used/applied for additional purposes such as a lightweight TEE-OS (where we are looking at supporting primary and secondary m-mode contexts) and/or providing a separate attestable context for the m-mode TCB component in a confidential compute solution. I therefore wonder if a more generic naming scheme would be appropriate (e.g. mpepc for m-mode primary epc),  or perhaps we should “byte the bullet!” and address this requirement by adding a new privilege level (which this change adds most of the state needed to implement).





From: tech-privileged@... <tech-privileged@...> On Behalf Of Andrew Waterman
Sent: 04 October 2022 02:08
To: tech-privileged <tech-privileged@...>
Subject: [RISC-V] [tech-privileged] Fast-track extension proposal for Resumable Non-Maskable Interrupts (Smrnmi)



We're submitting for your consideration an extension for resumable non-maskable interrupt (RNMI) support.


You might recall that the current non-maskable interrupt support defined in the M-mode chapter of the priv spec is unresumable (UNMI) when actioned from within M-mode.  While the optional UNMI facility continues to exist, we expect many NMI use cases will move to the RNMI scheme.

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