Re: Meaning of Implemented in Sstc specification


Oscar Jupp
 

Dear Greg,
Thank you for your reply.
I am sorry that I miss the vital information.

Regards,
Oscar Jupp


---- Replied Message ----
From Greg Favor<gfavor@...>
Date 11/21/2022 12:44
To jupposcar<jupposcar@...>
Cc tech-privileged@...<tech-privileged@...> ,
kenney@...<kenney@...>
Subject Re: [RISC-V] [tech-privileged] Meaning of Implemented in Sstc specification
On Sun, Nov 20, 2022 at 4:11 AM jupposcar <jupposcar@...> wrote:
Dear architect,
SSTC spec said: "When STCE in menvcfg is one but STCE in henvcfg is zero, an attempt to access stimecmp (really vstimecmp) when V = 1 raises a virtual instruction exception, and VSTIP in hip reverts to its defined behavior as if this extension is not implemented.”
But when STCE in menvcfg is zero and STCE in henvcfg is one, What is the behavior of VSTIP in hip?

The Sstc spec, in the Env Config Support section, says (with my underline):

When STCE in menvcfg is zero, an attempt to access stimecmp or vstimecmp in a mode other than M-mode raises an illegal instruction exception, STCE in henvcfg is read-only zero, and STIP in mip and sip reverts to its defined behavior as if this extension is not implemented.


Greg

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