Re: [tech-tee] RISCV PMP enhancement
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I have just noticed a minor spec hole here: the new security exception has mCause=16. The question is, whether xEDELEG is RW or must be fixed as WARL 0?
I am assuming it must be fixed to 0, but this is not stated (for all x=m,s,u)
As an aside: EDELEG bits are a bit of a scarce resource (only 32bit in RV32, 64bits in RV64), as opposed to the CAUSE bits that map to them (2^31 possible exception values, so you can get exceptions that can't map to EDELEG bits).
If instead the security exception had mCause>=64, it would avoid using xEDELEG bits, though it would cost an MCAUSE bit and the exception would always be handled in MMode.
If we don't expect to ever need more than 32/64 exception types in the future, then it doesn't really matter.
On Mon, Nov 18, 2019 at 10:44 PM Joe Xie <joxie@...> wrote: