Re: Non-idempotent PMA and table walk accesses


Andrew Waterman
 



On Mon, May 18, 2020 at 3:26 PM Andrew Waterman <andrew@...> wrote:


On Mon, May 18, 2020 at 2:58 PM David Kruckemyer <dkruckemyer@...> wrote:
Hi all,

I have a simple question: does the architecture allow table walk accesses (reads or writes) to regions with the non-idempotent PMA?

The architecture doesn't explicitly disallow it, so the answer is probably "yes." However, I'm having a hard time understanding a system design in which such a table walk would be practical. Can someone provide a practical use-case for walking non-idempotent locations?

If no such use-case exists, would people object to imposing a restriction on table walk accesses to locations with the non-idempotent PMA? Or at least a comment strongly suggesting that platforms won't support that behavior?

The specification machinery exists to allow implementations to impose such a restriction: "For systems with page-based virtual memory, I/O and memory regions can specify which combinations of hardware page-table reads and hardware page-table writes are supported."

I'd support adding a note that permitting page-table accesses to idempotent regions is

Of course I meant “non-idempotent”... discouraging page-table accesses to idempotent regions might raise some hackles.

discouraged.  Banning it seems a little harsh, though I see where you're coming from.


Cheers,
David

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