Re: [tech-tee] RISCV PMP enhancement

Bill Huffman

Good point, Allen.  I think it would make good sense to begin assigning mCause values >= 64 where there's no likelihood of wanting a rapid delegation to a privilege below M.  The Security Exception is an obvious choice.


On 1/7/20 11:08 AM, Allen Baum wrote:

I have just noticed a minor spec hole here: the new security exception has mCause=16. The question is, whether xEDELEG[16] is RW or must be fixed as WARL 0?
 I am assuming it must be fixed to 0, but this is not stated (for all x=m,s,u)

As an aside:  EDELEG bits are a bit of a scarce resource (only 32bit in RV32, 64bits in RV64), as opposed to the CAUSE bits that map to them (2^31 possible exception values, so you can get exceptions that can't map to EDELEG bits). 
If instead the security exception had mCause>=64, it would avoid using xEDELEG bits, though it would cost an MCAUSE bit and the exception would always be handled in MMode.
If we don't expect to ever need more than 32/64 exception types in the future, then it doesn't really matter.

On Mon, Nov 18, 2019 at 10:44 PM Joe Xie <joxie@...> wrote:

Hi Andrew, all,


Any feedback?


From: tech-tee@... <tech-tee@...> On Behalf Of Joe Xie
Sent: Thursday, November 7, 2019 2:00 PM
To: Andrew Waterman <andrew@...>
Cc: tech-tee@...; tech-privileged@...; Bill Huffman <huffman@...>; 'Nick Kossifidis' <mick@...>
Subject: Re: [tech-tee] RISCV PMP enhancement


Thanks Anrew!


From: tech-tee@... <tech-tee@...> On Behalf Of Andrew Waterman
Sent: Thursday, November 7, 2019 3:09 AM
To: Joe Xie <joxie@...>
Cc: tech-tee@...; tech-privileged@...; Bill Huffman <huffman@...>; Nick Kociuk <nkociuk@...>
Subject: Re: [tech-tee] RISCV PMP enhancement


Thanks for sending along the latest revision.  I will try to give feedback this weekend, and hopefully some other members of the privileged architecture group can chime in as well.


On Wed, Nov 6, 2019 at 7:18 AM Joe Xie <joxie@...> wrote:

Hi Andrew and priv-group,


As some of you may knew the TEE group had been discussing enhancing PMP to prevent M mode accessing / executing from U/S/H physical space since last summit.


Now I think TEE group finally come close to a solid proposal, thanks to Nick, Bill and others who contributed to the draft. Although it is still under review but I think it is solid to get the proposal reviewed and gather feedback from priv. group as PMP is part of priv. spec.


Please see draft v2 below, feedbacks & comments are welcomed.


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