Re: Extending the number of PMP entries

Andrew Waterman

On Wed, May 27, 2020 at 5:15 AM Tariq Kurd <tariq.kurd@...> wrote:

Thanks for this Andrew, it’s really useful.

My only comment is:


“Up to 64 PMP entries are supported. Implementations may implement zero, 16, or 64 PMP CSRs. All PMP CSR fields are WARL and may be hardwired to zero. PMP CSRs are only accessible to M-mode.”


Whether we should require people to only hardwire the highest numbered entries to zero. Otherwise, in theory, a discovery mechanism which checks which PMP CSRs are writeable will need to probe all of them, instead of starting at the highest number (15 or 63) and then probing downwards until it finds the first writeable one. So there should be one writeable block starting from 0 and optionally one read-only-zero block in the highest numbered entries only.

I see what you're getting at, but since some vendors will (rightly) choose to hardwire some PMP registers, the sentiment seems impractical to enforce.

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