Re: Address Mapping Questions


Andrew Waterman
 

It's something that could conceivably be standardized by the Unix platform task group, but I'm unaware as to whether that's in their plan of record.


On Thu, Jun 4, 2020 at 6:46 PM Nagendra Gd <nagendra.gd@...> wrote:
Thanks Andrew - yes this de facto is great information. Is there any platform-level effort to convert this to a standard? 

Best Regards
Nagendra


On Thu, Jun 4, 2020 at 8:01 PM Andrew Waterman <andrew@...> wrote:
The memory map isn't in the spec because it's platform-defined.  Some folks use the SiFive CLINT as a de facto standard for the address map for mtime[cmp] and MSIP registers.  QEMU supports this as well.  You can find the CLINT memory map in Chapter 8 of https://sifive.cdn.prismic.io/sifive/86e05812-e9cd-4553-bfef-c7e715088055_sifive_coreip_U54MC_AXI4_rtl_v19_08p2p0_release_manual.pdf

On Thu, Jun 4, 2020 at 5:34 PM Nagendra Gulur <nagendra.gd@...> wrote:
Dear team,

This may be a basic question: I am trying to figure out where in the physical memory map are the "mtime" and "mtimecmp" registers to be placed.
Per the privileged spec, these registers are memory-mapped, but I could not find an address specification for these registers. Did I somehow miss finding this piece of information from the spec or is it actually not specified? If the latter, is there a different place where it is specified that an implementation should comply with?

Another question: are CSRs also memory mapped? In debug mode?

Thank you and apologies if these questions have been discussed and resolved before.

Best Regards
Nagendra


 

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