Coming back to designs where the implemented PA size is greater than the supported VA size (for example, 48b VA's and 50b+ PA's), and in contrast to always sign-extending when VA size is greater than PA size, the situation is a little more complicated when PA size is greater than VA size:

On hardware and software writes one wants to zero-extend if under M-mode or a Bare translation mode, or sign-extend if under a translated mode.  In other words that one extra storage bit is loaded with either zero or sign extension of the highest supported address bit.

Compliance testing should keep this class of scenarios (i.e. PAsize > VAsize) in mind.