Caching and sfence'ing (or not) of satp Bare mode "translations"
I would like to get people's views on the question of when is an sfence.vma required after changing the satp.mode field (to see what support there is for the following change/clarification in the Privileged spec).
Currently an sfence.vma is required when changing between SvXX modes, but is not required when changing to/from Bare mode.
In both cases there is an implicit wholesale change to the page tables, i.e. the translation of any given address generally has suddenly changed.
For some designs (that cache Bare mode translations in the TLBs for the sake of caching the PMA and PMP info for an address), having software be required to do an sfence.vma can simplify the hardware.
So the question is whether there should be architectural consistency in requiring sfence'ing after changing satp.mode (i.e. all mode changes require an sfence), versus having some mode cases being treated differently (i.e. changes to/from Bare mode not requiring an sfence)?
My (and Ventana's) bias is towards the former - for our sake and for other future high performance CPU designs by others. But I'm interested to see if others feel similarly or not.