Re: A proposal to enhance RISC-V HPM (Hardware Performance Monitor)


Hi Anup,


> The “bypass-sbi” DT property will break QEMU virt machine


No, it won’t.  Why should QEMU virt machine’s PMU follow this flag?  The platform can totally choose not to support the attribute of its PMU.



Of course, I know the SBI route works.  If you don’t see the benefit, based on what did you say the feature is good? 

Your words were “Allowing S-mode to write HPMCOUNTER CSR is good but won’t benefit much.” So the issue here is if it will benefit much or marginally.

Writing from S-mode can skip the whole M-mode part every time the kernel wants to write CSRs.  Isn't that obvious?


Also, you didn't comment on my final part yet.




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