Re: A proposal to enhance RISC-V HPM (Hardware Performance Monitor)


Anup Patel
 

Hi Alan,

 

My statement “Allowing S-mode to write HPMCOUNTER CSR is good but won’t benefit much.” is because:

  1. Linux PMU updates counter value in-frequently only in start() callback
  2. The SBI_PMU_COUNTER_START/STOP calls will be used to turn-on and turn-off counting in start() and stop() callbacks respectively
  3. Due to point1 and point2, we can easily set the HPMCOUNTER value in SBI implementation via SBI_PMU_COUNTER_START call.

 

Regards,

Anup

 

From: tech-privileged@... <tech-privileged@...> On Behalf Of alankao
Sent: 05 August 2020 14:11
To: tech-privileged@...
Subject: Re: [RISC-V] [tech-privileged] A proposal to enhance RISC-V HPM (Hardware Performance Monitor)

 

Hi Anup,

 

> The “bypass-sbi” DT property will break QEMU virt machine

 

No, it won’t.  Why should QEMU virt machine’s PMU follow this flag?  The platform can totally choose not to support the attribute of its PMU.

 

 

Of course, I know the SBI route works.  If you don’t see the benefit, based on what did you say the feature is good? 

Your words were “Allowing S-mode to write HPMCOUNTER CSR is good but won’t benefit much.” So the issue here is if it will benefit much or marginally.

Writing from S-mode can skip the whole M-mode part every time the kernel wants to write CSRs.  Isn't that obvious?

 

Also, you didn't comment on my final part yet.

 

Thanks,

Alan

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