1. posterid:1775851
  2. A proposal to enhance RISC-V HPM (Hardware Performance Monitor)

Re: A proposal to enhance RISC-V HPM (Hardware Performance Monitor)

Jonathan Behrens <behrensj@...>
 

I'd also strongly argue for there only being a single configuration for both virtualized and non-virtualized systems. The fewer different cases that software has to handle, the better for everyone. This is especially true for smaller projects like research/teaching operating systems, which don't have the resources of something like the Linux kernel.

There is a long history of paravirtualization (virtualization where the guest kernel knows it is in a VM), but that is generally only done in cases where the original interface was poorly designed, or for exposing features that don't make sense on actual hardware. I don't think it should be used here.

Jonathan


On Wed, Aug 5, 2020 at 5:23 AM Anup Patel via lists.riscv.org <anup.patel=wdc.com@...> wrote:

Hi Alan,

 

My statement “Allowing S-mode to write HPMCOUNTER CSR is good but won’t benefit much.” is because:

  1. Linux PMU updates counter value in-frequently only in start() callback
  2. The SBI_PMU_COUNTER_START/STOP calls will be used to turn-on and turn-off counting in start() and stop() callbacks respectively
  3. Due to point1 and point2, we can easily set the HPMCOUNTER value in SBI implementation via SBI_PMU_COUNTER_START call.

 

Regards,

Anup

 

From: tech-privileged@... <tech-privileged@...> On Behalf Of alankao
Sent: 05 August 2020 14:11
To: tech-privileged@...
Subject: Re: [RISC-V] [tech-privileged] A proposal to enhance RISC-V HPM (Hardware Performance Monitor)

 

Hi Anup,

 

> The “bypass-sbi” DT property will break QEMU virt machine

 

No, it won’t.  Why should QEMU virt machine’s PMU follow this flag?  The platform can totally choose not to support the attribute of its PMU.

 

 

Of course, I know the SBI route works.  If you don’t see the benefit, based on what did you say the feature is good? 

Your words were “Allowing S-mode to write HPMCOUNTER CSR is good but won’t benefit much.” So the issue here is if it will benefit much or marginally.

Writing from S-mode can skip the whole M-mode part every time the kernel wants to write CSRs.  Isn't that obvious?

 

Also, you didn't comment on my final part yet.

 

Thanks,

Alan
Join {tech-privileged@lists.riscv.org to automatically receive all group messages.