The context switching overhead for VirtIO interrupts that this proposal is trying to solve is already solved across architectures by:
The point2 is intentionally not done for KVM RISC-V because we don’t want in-kernel PLIC emulation due to lack of MSI support and Virtualization support in PLIC. Also, the in-kernel PLIC emulation will become redundant once new interrupt controller spec is available. We will go for in-kernel interrupt controller emulation once new interrupt controller spec is available.
Is there any other advantage of this proposal over VHost + In-kernel interrupt-controller ??
From: tech-privileged@... <tech-privileged@...>
On Behalf Of Yifei Jiang via lists.riscv.org
In this proposal, we extended N extension and applied it to H extension for improving the performance of virtual I/O devices in the virtualization scenario. We proposed a new mechanism to delegate exceptions from VS-mode/VU-mode to U-mode. A solution is also implemented based on QEMU simulator and KVM virtualization architecture. Evaluation results show that our proposal achieves nearly 2x faster synchronous I/O processing speed than the orginal system.
The attachment is the detailed proposal. Any comments are welcome.