the current size of the virtual address space is 48 bits.  (per the june 2019 spec - volume II)

as many of you know,  INTEL has increased their address space to 57 bits.  several designers of server and hpc class of riscv systems  have  asked me about this.

so,  what is the current view on this.  will riscv support the a 57 bit logical address space.

with the newer class of NVM  being   implemented,  many systems are looking at directly addressing,  cluster-wide ALL of physlcal memory