Allen Baum wrote:
> Questions: (I suspect I know the answers, but want to be clear):
>   -if  mstateenY[n] is cleared, and s-mode code tries to read/write a CSR
> that is controlled by that bit
>     -- does the access trap?
>     -- else does it cause read/writes of the CSR from Smode
>         --- to return zero/have no effect
>         --- to return the value it had at the time that the bit was
> cleared/have no effect
>
> Or put another way: what exactly does "control access" mean?

I forgot to say what that means, didn't I?  Good point!

To quote Admiral Ackbar:  "It's a trap!"  You get an illegal
instruction trap, unless you're executing in a virtual machine (V = 1)
and the access is _not_ being blocked by the mstateen CSRs, in which
case you get a virtual instruction trap.

(Related to that, it's on my to-do list to add to the Privileged
Architecture's hypervisor chapter a better general explanation for
when you should get a virtual instruction trap instead of an illegal
instruction trap.)

    - John Hauser