Re: RISC-V H-extension freeze consideration
Jonathan Behrens <behrensj@...>
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What sort of device exposes regions of memory in I/O space? When I think of hypervisors emulating devices, all their registers typically do stuff when you write to them.
On Sat, May 29, 2021 at 12:47 PM John Hauser via lists.riscv.org <jh.riscv=jhauser.us@...> wrote:
Anup Patel wrote:
> Why do we need to re-purpose G-bit because we already
> have PMAs marking all MMIO addresses as I/O region ?
To repeat myself:
> The issue concerns when a hypervisor is emulating a
> device that has memory that is supposed to be in I/O space but is actually
> being emulated using main memory. A guest OS expects accesses to that
> virtual device memory to be in I/O space and ordered according to the I/O
> rules, but that's not currently what happens.
The PMAs aren't correct in this situation.
- John Hauser