RISC-V Hypervisor Updates


Anup Patel
 

Hi All,

We have updated Spike, QEMU RISC-V, KVM RISC-V and Xvisor RISC-V for
RISC-V H-Extension v0.6.1 spec.

The QEMU RISC-V is our default development vehicle for RISC-V hypervisor
software (because it is quite fast) whereas Spike can be quite useful to CPU
designers/architects for experimenting and generating instruction traces
of RISC-V hypervisors.

The QEMU repo with RISC-V H-Extension v0.6.1 support can be found here:
https://github.com/kvm-riscv/qemu.git

To try KVM RISC-V, refer:
https://github.com/kvm-riscv/howto/wiki/KVM-RISCV64-on-QEMU
https://github.com/kvm-riscv/howto/wiki/KVM-RISCV64-on-Spike
https://github.com/kvm-riscv/linux.git
https://github.com/kvm-riscv/kvmtool.git

To try Xvisor RISC-V, refer:
https://github.com/avpatel/xvisor-next/blob/master/docs/riscv/riscv64-qemu.txt
https://github.com/avpatel/xvisor-next/blob/master/docs/riscv/riscv64-spike.txt
https://github.com/avpatel/xvisor-next.git

Regards,
Anup


andrew@...
 

Thanks for the update, Anup!


On Sat, Jul 25, 2020 at 3:46 AM Anup Patel <anup.patel@...> wrote:
Hi All,

We have updated Spike, QEMU RISC-V, KVM RISC-V and Xvisor RISC-V for
RISC-V H-Extension v0.6.1 spec.

The QEMU RISC-V is our default development vehicle for RISC-V hypervisor
software (because it is quite fast) whereas Spike can be quite useful to CPU
designers/architects for experimenting and generating instruction traces
of RISC-V hypervisors.

The QEMU repo with RISC-V H-Extension v0.6.1 support can be found here:
https://github.com/kvm-riscv/qemu.git

To try KVM RISC-V, refer:
https://github.com/kvm-riscv/howto/wiki/KVM-RISCV64-on-QEMU
https://github.com/kvm-riscv/howto/wiki/KVM-RISCV64-on-Spike
https://github.com/kvm-riscv/linux.git
https://github.com/kvm-riscv/kvmtool.git

To try Xvisor RISC-V, refer:
https://github.com/avpatel/xvisor-next/blob/master/docs/riscv/riscv64-qemu.txt
https://github.com/avpatel/xvisor-next/blob/master/docs/riscv/riscv64-spike.txt
https://github.com/avpatel/xvisor-next.git

Regards,
Anup