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Meaning of Implemented in Sstc specification
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Oscar Jupp
Dear Greg, Thank you for your reply. I am sorry that I miss the vital information. Regards, Oscar Jupp
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On Sun, Nov 20, 2022 at 4:11 AM jupposcar <jupposcar@...> wrote:
The Sstc spec, in the Env Config Support section, says (with my underline): When STCE in menvcfg is zero, an attempt to access stimecmp or vstimecmp in a mode other than M-mode raises an illegal instruction exception, STCE in henvcfg is read-only zero, and STIP in mip and sip reverts to its defined behavior as if this extension is not implemented. Greg |
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Greg Favor
On Sun, Nov 20, 2022 at 4:11 AM jupposcar <jupposcar@...> wrote:
The Sstc spec, in the Env Config Support section, says (with my underline): When STCE in menvcfg is zero, an attempt to access stimecmp or vstimecmp in a mode other than M-mode raises an illegal instruction exception, STCE in henvcfg is read-only zero, and STIP in mip and sip reverts to its defined behavior as if this extension is not implemented. Greg |
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Greg Favor
On Fri, Nov 18, 2022 at 7:25 AM <kenney@...> wrote: The Sstc specification has this text (referring to whether STIP is writable): In the context of the overall Sstc spec, this text is correct in stating the baseline behavior when Sstc is implemented or not (and is precisely correct when Sstc is not implemented). And then the Environment Config Support section provides a more nuanced spec of what happens when STCE=0 - which isn't simply the preceding "not implemented" text. Instead, the more precise and complete spec is that: When STCE in menvcfg is zero, an attempt to access stimecmp or vstimecmp in a mode other
than M-mode raises an illegal instruction exception, STCE in henvcfg is read-only zero, and STIP
in mip and sip reverts to its defined behavior as if this extension is not implemented. Can you please clarify what is meant by implemented here? Andrew Waterman pointed me at a statement in the Privileged Specification that indicated that implemented implicitly meant implemented and enabled, but that doesn't seem fully relevant here, for the reason that if the Sstc extension is present then stimecmp is always accessible at M-mode, so in some sense this extension is always enabled. This is why the first excerpted text above about when Sstc is not implemented, does not also apply to when Sstc is implemented and disabled. It feels that, for software backwards-compatibility, STIP should be writeable by M-mode if menvcfg.STCE=0 and read-only if menvcfg.STCE=1, but I am unsure whether this is the intention. I think the second excerpted text above is pretty direct and clear as to the intention (which matches what one would want for backwards-compatibility). Greg |
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kenney@...
The Sstc specification has this text (referring to whether STIP is writable):
If the stimecmp register is not implemented, STIP is writable in mip, and may be written by M-mode software to deliver timer interrupts to S-mode. If the stimecmp (supervisor-mode timer compare) register is implemented, STIP is read-only in mip and reflects the supervisor-level timer interrupt signal resulting from stimecmp. Can you please clarify what is meant by implemented here? Andrew Waterman pointed me at a statement in the Privileged Specification that indicated that implemented implicitly meant implemented and enabled, but that doesn't seem fully relevant here, for the reason that if the Sstc extension is present then stimecmp is always accessible at M-mode, so in some sense this extension is always enabled. It feels that, for software backwards-compatibility, STIP should be writeable by M-mode if menvcfg.STCE=0 and read-only if menvcfg.STCE=1, but I am unsure whether this is the intention. A similar clarification is needed for VSTIP, when the Hypervisor is implemented. Thanks. |
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