Next SIG-Safety meeting on error reporting and management.

Jérôme Quévremont



I am Jérôme Quévremont, Thales, chair of the special interest group Functional Safety (SIG-Safety). The vice-chair is Amit Pabalkar, NVIDIA. According to RVI governance, SIG-Safety reports to the RASD TG.


SIG-Safety is currently preparing the “blueprint of a safey processor”. At each meeting, we address a different “attribute”. Our next attribute is the error management and reporting, which seems to relate to relate to your work.


If you want to know more of SIG-Safety’s views on error reporting, or if you want to share your views and progress, I suggest you to join our next meetings on this topic:

-          Wednesday Feb. 24th, 9am PST, 6pm CET: preparation meeting (more technical)

-          Wednesday Mar. 3rd, 9am PST, 6pm CET: general meeting


The Zoom link is




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Hao Guan

Hi Jérôme, thank you for your notice. 
We are going to discuss about RASD final charter on next meeting(Thursday, Feb. 25th, 7am PST, 4pm CET, 11pm China).
Do you have time to give a brief introduction about your topic on RASD next meeting?
Hao Guan