Should we add the vector crypto intrinsics to this spec?

Hi all, A reminder that the next open meeting to discuss on the RISC-V V C Intrinsic API v1.0 is going to be held later on 2022/02/23 6AM (GMT -7) / 11PM (GMT +8). The agenda can be found in the secon

Hi, I just attended today's monthly meeting but unfortunately something was wrong with my device. I feel so sorry that I was unable to discuss my pull request on bfloat16 even though I heard eop was c

Hi all, A reminder that the next open meeting to discuss on the RISC-V V C Intrinsic API v1.0 is going to be held later on 2023/05/15 7AM (GMT -7) / 10PM (GMT +8). The agenda can be found in the secon

Hi all, A reminder that the next open meeting to discuss on the RISC-V V C Intrinsic API v1.0 is going to be held later on 2023/04/17 6AM (GMT -7) / 11PM (GMT +8). The agenda can be found in the secon

Hi, In https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/master/rvv-intrinsic-rfc.md#mask-in-intrinsics I see an additional argument, maskedoff, on some intrinsics. What is an example of why thi

Hi, A few questions on policy intrinsics definitions from here - https://github.com/riscv-non-isa/rvv-intrinsic-doc/blob/master/rvv-intrinsic-rfc.md#policy 1. It seems like the current v0.11 intrinsic

Hi, Shouldn't these intrinsics have a source operand in addition to vl? -rich

Hi, I see prototypes for the vslideup intrinsics similar to this: vint32m1_t __riscv_vslideup_vx_i32m1 (vint32m1_t dest, vint32m1_t src, size_t offset, size_t vl); what is the expected value of 'dest'

Hi, All I see in github is a tag for v0.11. Where can I find a WIP for v1.0? And where is the compatability wrapper that's mentioned in the meeting minutes? -rich

Hi all, A reminder that the next open meeting to discuss on the RISC-V V C Intrinsic API v1.0 is going to be held later on 2023/03/20 6AM (GMT -7) / 11PM (GMT +8). The agenda can be found in the secon

Hi, I have a couple of questions about the proper coding for widening and narrowing intrinsics. First, for multiply and add, I wrote: void vector_wmac (int16_t *src1, int16_t *src2, int32_t *dest) { s

Hi, Is the element type of the index vector actually SEW = signed int, or can the type be floating point as the intrinsic functions currently define? -rich

Hi all, Since it is holiday today (2/20, President day) in the US, we are going to postpone the monthly meeting to Thursday this week(2/23). Regards, eop Chen

The meeting minutes in added in the note. You can also find it under riscv-admin/rvv-intrinsics.

Hi all, A reminder that the next open meeting to discuss on the RISC-V V C Intrinsic API v1.0 release is going to be held later on 2022/02/02 6AM (GMT -7) / 11PM (GMT +8). The agenda can be found in t

Hi all, A reminder that the next open meeting to discuss on the RISC-V V C Intrinsic API v1.0 release is going to be held on 2023/01/05 6AM (GMT -7) / 11PM (GMT +8). The agenda can be found in the sec

Hi Eop, In your RFC announcement post to SIG toolchains, you state: "The main goal of this release is to stablize the using environment of the RVV C intrinsics for the users. So as mentioned in the fi

Hi all, I just recognized that December 26th is conventionally a holiday in the US, and the next Monday, January 3rd, is also a holiday. Since people often take the last week of December off, I want t

Hi all, A reminder that the next open meeting to discuss on the RISC-V V C Intrinsic API v1.0 release is going to be held on 2022/11/28 6AM (GMT -7) / 11PM (GMT +8). For folks in Asia, be noted that t