The proposal allows for prefetchable BARs to be programmed to support as I/O or Memory. This seems to conflict with the priv spec that states:
"""
Memory regions that do not fit into regular main memory, for example, device scratchpad RAMs, are categorized as I/O regions.
"""
I agree that it is useful to allow for Memory treatment of some address space in some PCIe devices. So there should be an action to accommodate that by adjusting the wording in the priv spec.
