Re: [tech-aia] RISC-V ACLINT specification is now hosted on RISC-V GitHub
On Fri, Jul 16, 2021 at 10:10 PM Greg Favor <gfavor@...> wrote:
Common AMBA utility bus standards like the AXI-Lite buses don't support burst accesses - and hence the bus width does set the access width. These bus standards are intended to be simple and sufficient for accessing memory-mapped registers.
Add to the list the popular APB bus standard used by many IPs for access to their memory-mapped registers. It only supports up to 32-bit accesses.