Re: Proposal v2: SBI PMU Extension

Brian Grayson

> > > > The SBI PMU event_idx is a XLEN bits wide number encoded as
> > > > follows:
> > > > event_idx[XLEN-1:16] = info
> > > > event_idx[15:12] = type
> > > > event_idx[11:0] = code

Is there a reason you are limiting the event to 16 bits? On current designs, the mhpmeventX field is already >16 bits wide. I don't see an easy way to support that with this approach directly. (Or maybe I'm missing something?)

Are your event listings intended to represent a layer of mapping between SBI event numbers and actual how-to-program-the-silicon numbers (which would get around the issue above)? They do not match up with Rocket events, for example. Given the number of potential implementers, it is likely impossible to get agreement on a common base set of hardware-compatible events unless we act now, or yesteryear. :)

I would also recommend at least discussing adding an SBI call that allows one to do a wide write of many/all registers, otherwise writes become incredibly more expensive than reads. I can think of two use-cases that would be writing many of the counters at least several hundred times a second, and maybe even more rapidly. 


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