Re: Proposal v2: SBI PMU Extension
Based on my previous reply…
To monitor RAW event 0x12345678, user-space perf tool will create user space perf RAW event (i.e. perf_event_attr.type == 4 and perf_event_attr.config = = 0x12345678). The Linux RISC-V PMU driver will allocate and map matching HARDWARE counter which supports specified corrosponding SBI RAW event (event_idx.type = 2, event_idx.code = 0x678 and event_idx.info = 0x12345). Finally, the SBI_PMU_COUNTER_START call implemented by OpenSBI will write 0x12345678 (or some platform specific translated value of 0x12345678) to appropriate mhpmeventX CSR).
(Note: above we assume mhpmcounterX supports monitoring RAW event 0x12345678 and OpenSBI is aware of this)
From: Brian Grayson <brian.grayson@...>
My question is, let's say I know that putting the value 0x12345678 into the mhpmevent3 register gets me the event I want, and there is no support for that event in the SBI spec/API. Will this API allow me to program such an event, basically bypassing the usual mapping functionality? perf basically allows you to say "I know this event number is not one you know about, but it's the value I want placed directly into the hardware." I want to ensure that the full capabilities of the hardware will still be accessible through the SBI spec in some sort of "raw" mode, and I didn't see a way for that to happen right now. We don't want to restrict users to the lowest common denominator of functionality.
On Wed, Jul 8, 2020 at 10:27 PM Zong Li <zong.li@...> wrote: