On Mon, Dec 13, 2021 at 10:44:41AM -0800, Kumar Sankaran wrote:
Will wording this as "Main memory must be protected with SECDED-ECC at the minimum or a stronger/advanced method of protection" suffice?
Thanks. Yes.
The current wording is the following. All cache structures must be protected. single-bit errors must be detected and corrected. multi-bit errors can be detected and reported. Platforms are free to implement more advanced features than the minimalistic requirements that are mandated here. So we should be OK. Agree?
Could I suggest: "Cache structures must be protected to address the Failure-in-time (FIT) requirements. The protection mechanisms may included single-bit/multi-bit error detection and/or single/multi-bit error detection/correction schemes, replaying faulting instructions, lock-step execution, etc."
The current wording is "The platform should provide the capability to configure each RAS error to trigger firmware-first or OS-first error interrupt". Will this suffice or do we need to add more clarity?
Could I suggest: "The platform should provide capability to configure RAS errors to trigger firmware-first or OS-first error interrupts."
