Re: Platform specification questions


Kumar Sankaran
 

Thanks Ved. Minor nits below.
Would you be OK to send out a patch to the mailing list for these 3
changes and then subsequently a PR to the platform git on github? Let
me know if you need any help with this.

On Mon, Dec 13, 2021 at 11:06 AM Ved Shanbhogue <ved@...> wrote:

On Mon, Dec 13, 2021 at 10:44:41AM -0800, Kumar Sankaran wrote:
Will wording this as "Main memory must be protected with SECDED-ECC at
the minimum or a stronger/advanced method of protection" suffice?
Thanks. Yes.

The current wording is the following.
All cache structures must be protected.
single-bit errors must be detected and corrected.
multi-bit errors can be detected and reported.
Platforms are free to implement more advanced features than the
minimalistic requirements that are mandated here. So we should be OK.
Agree?
Could I suggest:
"Cache structures must be protected to address the Failure-in-time (FIT) requirements. The protection mechanisms may included single-bit/multi-bit error detection and/or single/multi-bit error detection/correction schemes, replaying faulting instructions, lock-step execution, etc."
Agree. I suggest we keep it high level and simply say "Cache
structures must be protected to address the Failure-in-time (FIT)
requirements. The protection mechanisms may include
single-bit/multi-bit error detection and/or single/multi-bit error
detection/correction schemes".



The current wording is "The platform should provide the capability to
configure each RAS error to trigger firmware-first or OS-first error
interrupt".
Will this suffice or do we need to add more clarity?
Could I suggest:
"The platform should provide capability to configure RAS errors to trigger firmware-first or OS-first error interrupts."
Agree.


regards
ved


--
Regards
Kumar

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