- Access problem of mtimercmp in a platform with multiple MTIMER devices
Re: Access problem of mtimercmp in a platform with multiple MTIMER devices
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The implication of that is that either
- there is an mmio address that can access different instantiations of mtime/mtimecmp for each requesting hart (depending on the "cluster")
- each "cluster" can have its own unique mmio address for mtimecmp (which may or may not be accessible to other "clusters")
Is one or either of those a preferred option? The latter sounds like it would be difficult for SW
In the SiFive Core-Local Interruptor (CLINT) device , a core can access the mtimcmp register of all cores in the platform.
In the ACLINT spec, If a platform implements multiple MTIMER devices, such as multiple clusters, each cluster implements one MTIMER device, then a core may not be able to access the MTIMER devices of other clusters.
As I understand, it is not necessary for a core to access the mtimecmp of other cores. Is it possible to add a recommended software usage method to the ACLINT spec, for example, it is recommended that the software only use a core to access its own mtimcmp register, but not access mtimcmp of other cores. This can avoid the problem that the software uses a core to access the MTIMER devices of other clusters, but the hardware cannot support it.
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