1. Tech-Unixplatformspec
  2. Messages

Re: Proposal: RISC-V Hypervisor Sync-up Call

Sandro Pinto
 

Hi Anup and all,

At my research lab we have:

1. Extended a RISC-V Rocket core per the RISC-V H-extension specification (v 0.6.1);

2. Extended the PLIC to support guest external interrupts;

3. Extended our in-house hypervisor (Bao - https://github.com/bao-project/bao-hypervisor/tree/wip/riscv) with RISC-V hardware virtualization support;

4. Developed a demo of the full system (Rocket + H extension + FreeRTOS + Linux) on a Xilinx ZCU104 FPGA - small video on Twitter:
https://twitter.com/sandro2pinto/status/1300502824376303621

We are currently focused on benchmarking the full system with cycle-accurate simulation using Firesim.

Happy to participate in the calls and help and/or share our experience in any sense.

Thanks
Sandro

On Mon, Aug 31, 2020 at 2:11 PM Anup Patel <anup.patel@...> wrote:
Hi All,

Quite a few organizations are working on implementing RISC-V
H-extension.

I suggest to have a regular RISC-V Hypervisor Sync-up Call to:
1) Coordinate RISC-V hypervisor software efforts so that two
     different organization/individuals don't end-up doing same
     work.
2) Decide priorities and future directions for RISC-V hypervisor
     software efforts.
3) Distro expectations from RISC-V hypervisor (particularly KVM RISC-V)
4) General discussion around validating RISC-V hypervisor software
     in RTL simulation or FPGA or real SOC
5) Anything else ???

Regards,
Anup
Join tech-unixplatformspec@lists.riscv.org to automatically receive all group messages.