Re: [PATCH v1 2/2] Section 3.1.4 System Peripherals.

Greg Favor

On Thu, Apr 22, 2021 at 5:53 PM Abner Chang <renba.chang@...> wrote:
Should we have to define the implementation when the watchdog stage 2 is timeout?
How to handle the timeout should be platform design specific (the HW could be BMC on server or EC on laptop). It is also firmware implementation specifc, system FW or BMC FW may do something else before resetting the system.
Is the below statement sufficient?
"If the mtime/time increments past the watchdog stage 2 compare value an interrupt shall be raised for the further actions."

For comparison sake, here's what SBSA says:

Watchdog Signal 0 is routed as an SPI or an LPI to the GIC and it is expected this will be configured as an EL2 interrupt, directly targeting a single PE.

Watchdog Signal 1 must be routed to the platform. In this context, platform means any entity that is more privileged than the code running at EL2. Examples of the platform component that services Watchdog Signal 1 are: EL3 system firmware, or a system control processor, or dedicated reset control hardware.

The action taken on the raising of Watchdog Signal 1 is platform-specific.

Raising an interrupt for WD stage 2 - meaning an interrupt to an application processor - is just doing what WD stage 1 did.

Instead WD stage 2 needs to notify (via an interrupt or other means) an non-application processor entity like the things mentioned above.


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