RISC-V ACLINT specification is now hosted on RISC-V GitHub


Anup Patel
 

Hi All,

The RISC-V ACLINT specification is now hosted on RISC-V GitHub page:
https://github.com/riscv/riscv-aclint
https://github.com/riscv/riscv-aclint/blob/master/riscv-aclint.adoc

Please review this at your end send feedback on AIA/Platform mailing
lists.

The RISC-V ACLINT specification is intended to be small and backward
compatible to the SiFive CLINT specification which makes existing
RISC-V platforms compliant with the RISC-V ACLINT specification.

Overall, from platforms specification perspective it complements
the RISC-V AIA specification by providing IPI and Timer functionality.

A complete functional implementation is available for QEMU RISC-V
along with OpenSBI and Linux RISC-V changes. Please refer, the
riscv_aclint_v1 branch in following repos:
https://github.com/avpatel/qemu.git
https://github.com/avpatel/opensbi.git
https://github.com/avpatel/linux.git

To enable ACLINT emulation on QEMU, use "-M virt,aclint=on"
instead of just "-M virt" in your QEMU command line. For now,
QEMU supports ACLINT only for virt machine.

Regards,
Anup

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