Re: [tech-aia] RISC-V ACLINT specification is now hosted on RISC-V GitHub

Anup Patel

Hi Josh,


Indeed, I missed adding text regarding verifying delta and ensuring that it is within bounds. Thanks for pointing.


I was thinking that aclint_mtime_sync() function should return the adjustment value (delta) so that high-level caller can try acling_mtime_sync() few times until the returned adjustment (delta) becomes zero (or close to it).





From: tech-aia@... <tech-aia@...> On Behalf Of Josh Scheid
Sent: 27 May 2021 01:58
To: Anup Patel <Anup.Patel@...>
Cc: tech-aia@...; tech-unixplatformspec@...; Atish Patra <Atish.Patra@...>; Greg Favor <gfavor@...>; Alistair Francis <Alistair.Francis@...>; Andrew Waterman <andrew@...>; John Hauser <jh.riscv@...>
Subject: Re: [tech-aia] RISC-V ACLINT specification is now hosted on RISC-V GitHub


Thanks for writing this up, Anup.


In, the SW algorithm should include verifying the reference-target delta, retrying if the delta is out of bounds, and / or reporting failure to verify the synchronization is in bounds.





On Tue, May 25, 2021 at 10:18 PM Anup Patel <anup.patel@...> wrote:

Hi All,

The RISC-V ACLINT specification is now hosted on RISC-V GitHub page:

Please review this at your end send feedback on AIA/Platform mailing

The RISC-V ACLINT specification is intended to be small and backward
compatible to the SiFive CLINT specification which makes existing
RISC-V platforms compliant with the RISC-V ACLINT specification.

Overall, from platforms specification perspective it complements
the RISC-V AIA specification by providing IPI and Timer functionality.

A complete functional implementation is available for QEMU RISC-V
along with OpenSBI and Linux RISC-V changes. Please refer, the
riscv_aclint_v1 branch in following repos:

To enable ACLINT emulation on QEMU, use "-M virt,aclint=on"
instead of just "-M virt" in your QEMU command line. For now,
QEMU supports ACLINT only for virt machine.


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