To all the system software people on the tech-unixplatformspec and software email lists: The tech-virt-mem Task Group is considering two alternative approaches for specifying address/page-based

Hi all, We are working on KVM and QEMU related items. 1. Virtual interrupt related features. 2. Enhanced I/O virtualization framework. 3. Other advanced virtualization features, such as

+ Paul/Palmer Any other comments/suggestions ? It would be great if we conclude either way and have some standard reset mechanism sooner than later. -- Regards, Atish

SBI RESET extension is optional. So S-mode software can always fallback on CONFIG_SYSREST to reset the system. -- Regards, Atish

Hi Anup, If we go for solution 2, S-mode software is still able to issue reset the whole system directly using CONFIG_SYSRESET sort of drivers. Is this an expected use case? Regards, Bin

Hi All, Two solutions were discussed at LPC2020 for RISC-V S-mode system reset mechanism. (Slides,

Hi Anup and all, At my research lab we have: 1. Extended a RISC-V Rocket core per the RISC-V H-extension specification (v 0.6.1); 2. Extended the PLIC to support guest external interrupts; 3.

Anup ok so this is timely as we would like access to code to run on our simulators as they pass all our internal tests and we now look for external code suites. when will the meeting be? thanks Simon

Hi All, Quite a few organizations are working on implementing RISC-V H-extension. I suggest to have a regular RISC-V Hypervisor Sync-up Call to: 1) Coordinate RISC-V hypervisor software efforts so

You have been invited to the following event. Unix platform specification working group meeting When Every 2 weeks from 8am to 9am on Thursday from Thu Sep 10 to Thu Dec 10 Pacific Time - Los

yes. When the group was proposed (almost 18 months back), the idea was to first come up with subset of specifications (SBI, PLIC) under unix platform specification. We have SBI v0.2 specification and

I think it is supposed to be in Groups.IO The description in the front page there is sparse: https://lists.riscv.org/g/tech-unixplatformspec Remember from our meeting we'd like to revise the Platform

Hi Al, That is the current Platform TG charter, but you can certainly revise it, add more detail, and broaden the scope. You can also roll out your own roadmap for future Platform

Thanks. I think :). As a very first step, does there currently exist an approved charter and/or plan for the UNIX platform task group? There's a very brief statement in the member's area of

Resend on the request of Mark. ---------- Forwarded message --------- From: mark <markhimelstein@...> Date: Thu, Jul 30, 2020 at 4:23 PM Subject: Re: [RISC-V] [tech-unixplatformspec] [RISC-V]

Hi all, The TSC has approved Al Stone as UNIX Platform Task Group Chair just in time for today’s meeting. Congrats, Al. It’s great to have you on board. Best, ArunNotice: This email and

Hi Greg, I have updated event_idx.type values like you suggested for v6 proposal. Regards, Anup

Anup, I believe event_idx.type == 0 and event_idx.code == 0 corresponds to this HARDWARE event: SBI_PMU_HW_CPU_CYCLES - which conflicts with this encoding needing to represent "No Event". One simple

Hi All, Small correction required here... The MHPMEVENT == zero means "No Event" as per RISC-V privilege spec so event_idx.type == 0 and event_idx.code == 0 should be treated as "No

Hi All, The next Unix platform specification working group meeting is scheduled on next Thursday(20th Aug 2020) at 8AM PST. Agenda: * SBI PMU specification discussion