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Re: Proposal v3: SBI PMU Extension

It also seems to fail if the specified event is not supported by the given counter, right? Then Linux driver could try to allocate the next free counter when returning failure from this SBI

It also seems to fail if the specified event is not supported by the given counter, right? Then Linux driver could try to allocate the next free counter when returning failure from this SBI

By Zong Li · #157 ·

Proposal v3: SBI PMU Extension

Hi All, We don't have a dedicated RISC-V PMU extension but we do have HARDWARE performance counters such as CYCLE CSR, INSTRET CSR, and HPMCOUNTER CSRs. A RISC-V implementation can support monitoring

Hi All, We don't have a dedicated RISC-V PMU extension but we do have HARDWARE performance counters such as CYCLE CSR, INSTRET CSR, and HPMCOUNTER CSRs. A RISC-V implementation can support monitoring

By Anup Patel · #156 ·

Re: Proposal v2: SBI PMU Extension

By Anup Patel · #155 ·

Re: Proposal v2: SBI PMU Extension

Anup, That would be a perfectly fine way to go. Thanks, Greg

Anup, That would be a perfectly fine way to go. Thanks, Greg

By Greg Favor · #154 ·

Re: Proposal v2: SBI PMU Extension

That is what I am concerned about. It doesn't make sense to me to abandon any bits, we couldn't limite vendor to reduce the space of encoding of events. Spec allows using full MXLEN bit for value of

That is what I am concerned about. It doesn't make sense to me to abandon any bits, we couldn't limite vendor to reduce the space of encoding of events. Spec allows using full MXLEN bit for value of

By Zong Li · #153 ·

Re: Proposal v2: SBI PMU Extension

Hi Greg, Using 20bits for event_idx.type and event_idx.code is good to me. Although, the “info” field in event_idx seems to be creating confusion. I suggest we have separate

Hi Greg, Using 20bits for event_idx.type and event_idx.code is good to me. Although, the “info” field in event_idx seems to be creating confusion. I suggest we have separate

By Anup Patel · #152 ·

Re: Proposal v2: SBI PMU Extension

By Anup Patel · #151 ·

Re: Proposal v2: SBI PMU Extension

It seems to me that It would waste the space to use 4bytes per-event for 20-bit data only, it is heavy especially when we have many events.

It seems to me that It would waste the space to use 4bytes per-event for 20-bit data only, it is heavy especially when we have many events.

By Zong Li · #150 ·

Re: Proposal v2: SBI PMU Extension

I understand that mapping of event_idx to HPMEVENT CSR value is platform-dependent, and m-mode firmware of each platform knows how to translate it. But there are still some problems which are

I understand that mapping of event_idx to HPMEVENT CSR value is platform-dependent, and m-mode firmware of each platform knows how to translate it. But there are still some problems which are

By Zong Li · #149 ·

Re: Proposal v2: SBI PMU Extension

I feel that RV32 designs are going to be more embedded oriented and more cost-conscious - such that they are not going to have all sorts of fancy features that would require 12 bits (plus unused

I feel that RV32 designs are going to be more embedded oriented and more cost-conscious - such that they are not going to have all sorts of fancy features that would require 12 bits (plus unused

By Greg Favor · #148 ·

Re: Proposal v2: SBI PMU Extension

Great. Yes, that would also be good. Thanks, Greg

Great. Yes, that would also be good. Thanks, Greg

By Greg Favor · #147 ·

Re: Proposal v2: SBI PMU Extension

Hi Greg, We have already considered what you are requesting. In fact, that is the right way to go. Translating event_idx[XLEN-1:0] to platform specific mhpmeventX CSR value will be optional in

Hi Greg, We have already considered what you are requesting. In fact, that is the right way to go. Translating event_idx[XLEN-1:0] to platform specific mhpmeventX CSR value will be optional in

By Anup Patel · #146 ·

Re: Proposal v2: SBI PMU Extension

Hi Greg, My bad for the confusion. Yes, I had agreed for 16bits event_idx.code and 4bits event_idx.type. I choose 12bits event_idx.code and 4bits event_idx.type so that we need only 2bytes

Hi Greg, My bad for the confusion. Yes, I had agreed for 16bits event_idx.code and 4bits event_idx.type. I choose 12bits event_idx.code and 4bits event_idx.type so that we need only 2bytes

By Anup Patel · #145 ·

Re: Proposal v2: SBI PMU Extension

Anup, Can I request that the default code path for turning an event_idx value into a value to write into mhpmeventX is to simply write event_idx[XLEN-1:0] into mhpmeventX. Future hardware can then

Anup, Can I request that the default code path for turning an event_idx value into a value to write into mhpmeventX is to simply write event_idx[XLEN-1:0] into mhpmeventX. Future hardware can then

By Greg Favor · #144 ·

Re: Proposal v2: SBI PMU Extension

Anup, I missed a point in the v1 email thread where I was requesting for event_idx.code to be 16 bits along with a 4-bit event_idx.type (which you seemed to agree with), and then you asked whether it

Anup, I missed a point in the v1 email thread where I was requesting for event_idx.code to be 16 bits along with a 4-bit event_idx.type (which you seemed to agree with), and then you asked whether it

By Greg Favor · #143 ·

Re: Proposal v2: SBI PMU Extension

By Anup Patel · #142 ·

Re: Proposal v2: SBI PMU Extension

Each element of Event_list consists of event_idx.type and event_idx.code, how does it present the raw event like above? (event_idx.info = 0x12345, event_idx.type = 0x2, event_idx.code = 0x678) It

Each element of Event_list consists of event_idx.type and event_idx.code, how does it present the raw event like above? (event_idx.info = 0x12345, event_idx.type = 0x2, event_idx.code = 0x678) It

By Zong Li · #141 ·

Re: Proposal v2: SBI PMU Extension

By Anup Patel · #140 ·

Re: Proposal v2: SBI PMU Extension

The Linux PMU driver should be aware of this as well, because SBI_PMU_COUNTER_START takes a parameter for countex_idx which is fed by Linux PMU driver.

The Linux PMU driver should be aware of this as well, because SBI_PMU_COUNTER_START takes a parameter for countex_idx which is fed by Linux PMU driver.

By Zong Li · #139 ·

Re: Proposal v2: SBI PMU Extension

By Anup Patel · #138 ·

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