Hi Aaron, I was under the impression that it is decided not to use the extension names mentioned in profile spec. Sorry I didn't know you are still working with TSC to conclude on this. In that case,

Hi All, We plan to send below two ECRs to UEFI forum on 08/08/2022. These two ECRs don't have any dependency on any unfrozen specs. Getting these two ECRs accepted by UEFI forum would help us to enabl

Hi Aaron, Since the ECRs need to be submitted as word doc, the plan was to archive the notes/comments and ECR versions in the gdrive itself. Please visit https://github.com/riscv-non-isa/riscv-acpi/wi

Hi All, Thanks a lot for great feedback over last week on the ECRs. I have created version 2 of the ECRs addressing most of the comments. We will be discussing this version of the ECRs in this week's

You have been invited to the following event. Ad-hoc ACPI ECR Review meeting - Part 2 When Mon Jul 4, 2022 9:30pm – 10:30pm India Standard Time - Kolkata Joining info Join with Google Meet meet.google

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You have been invited to the following event. Ad-hoc ACPI ECR Review meeting When Mon Jun 27, 2022 9:30pm – 10:30pm India Standard Time - Kolkata Joining info Join with Google Meet meet.google.com/dao

Hi Furquan, Yes, let's do that. I will setup a meeting on Monday 27th 2022. We can continue the discussion later if we can not finish in an hour. Thanks! Sunil

Hi All, Please review below Engineering Change Request (ECR) to update the ACPI spec for enabling basic ACPI support for RISC-V. 1) Add INTC structure in MADT Table - https://docs.google.com/document/

Hi All, I am pleased to inform that 45 days of public review period has ended for the RISC-V UEFI Protocol Spec. Feedbacks during review period are addressed. We will go through the remaining process

This is to announce the start of the public review period for the RISC-V UEFI Protocol specification. This specification is considered as frozen now as per the RISC-V International policies. The revie

RISC-V UEFI systems need to support new RISCV_BOOT_PROTOCOL. This protocol is required to communicate the boot hart ID from firmware to the bootloader/kernel. This protocol specification is maintained

Hi Abner, We need to add this requirement in the platform spec for sure. I will send the patch once this is frozen. But I think we also need to update the UEFI section 2.3.7.1 since it already talks a

Thanks. Updated as per your suggestion. https://github.com/riscv-non-isa/riscv-uefi/releases/download/0.3/EFI_RISCV_PROTOCOL-spec.pdf I will work with you, Heinrich and Abner to get an codefirst ECR t

Hi All, I think I have addressed your comments. Please take a look at https://github.com/riscv-non-isa/riscv-uefi/releases/download/0.2/EFI_RISCV_PROTOCOL-spec.pdf. If you think it is fine, I plan to

Even if there are no other RISC-V protocols today, Abner's suggestion will allow us to add them in future to the same document. We don't really need to merge the entire protocol to the UEFI spec. We n

Sure, Abner. Makes sense. Let me update the spec. Thanks Sunil

Hi Heinrich, Thank you very much for your constant feedback and pointers while drafting this spec. This makes perfect sense. Will update the spec. Jessica has given an input to change the parameter fr

Hi All, As we discussed in the Platform HSC meeting today, here is the document which details a new RISC-V specific EFI protocol. https://github.com/riscv-non-isa/riscv-uefi/releases/download/0.1/EFI_

As per feedback, reduced basic UEFI requirements to 2.6.1 of the UEFI spec. Added reason to understand why additional protocols need to be supported on top of basic requirements. Signed-off-by: Sunil