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[sig-hypervisors] [RISC-V] [tech-unixplatformspec] SBI Debug Console Extension Proposal (Draft v1)
I agree With the current design there is no way for the supervisor software to reclaim the memory once it has shared it with OpenSBI. We can add a close() call, but it seems simpler and safer to inste
I agree With the current design there is no way for the supervisor software to reclaim the memory once it has shared it with OpenSBI. We can add a close() call, but it seems simpler and safer to inste
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Alistair Francis
· #1748
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[PATCH v4 1/6] Additional requirements for H-extension
Reviewed-by: Alistair Francis <alistair.francis@...> Alistair
Reviewed-by: Alistair Francis <alistair.francis@...> Alistair
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Alistair Francis
· #1249
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[PATCH v4 6/6] Follow profile naming as-per latest RISC-V profiles spec
Why do these have 64 at the end? Alistair
Why do these have 64 at the end? Alistair
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Alistair Francis
· #1248
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[PATCH v4 5/6] Minor cosmetic changes in SBI section of OS/A-base platform
Reviewed-by: Alistair Francis <alistair.francis@...> Alistair
Reviewed-by: Alistair Francis <alistair.francis@...> Alistair
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Alistair Francis
· #1247
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[PATCH v4 3/6] Move terminology and specifications tables to correct location
Reviewed-by: Alistair Francis <alistair.francis@...> Alistair
Reviewed-by: Alistair Francis <alistair.francis@...> Alistair
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Alistair Francis
· #1246
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[PATCH 1/1] Initial commit of PLIC
Reviewed-by: Alistair Francis <alistair.francis@...> Alistair
Reviewed-by: Alistair Francis <alistair.francis@...> Alistair
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Alistair Francis
· #1094
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[PATCH v6 1/2] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform
Acked-by: Alistair Francis <alistair.francis@...> Alistair
Acked-by: Alistair Francis <alistair.francis@...> Alistair
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Alistair Francis
· #1038
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[RESEND PATCH v5 1/2] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform
Yep that's great for Linux systems. I haven't seen any embedded systems besides SiFive that use the CLINT though. For example SweRVolf uses a specific system controller: https://github.com/chipsallian
Yep that's great for Linux systems. I haven't seen any embedded systems besides SiFive that use the CLINT though. For example SweRVolf uses a specific system controller: https://github.com/chipsallian
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Alistair Francis
· #976
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[RESEND PATCH v5 1/2] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform
You have removed the original example, but not the original description. If we aren't supporting the adjancent addresses the paragraph above this should be removed. I still prefer to allow either adja
You have removed the original example, but not the original description. If we aren't supporting the adjancent addresses the paragraph above this should be removed. I still prefer to allow either adja
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Alistair Francis
· #974
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[PATCH v4 1/2] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform
It probably makes more sense to add a timer section and put the CLNIT there instead of forcing it into the interrupt controller section, when it isn't really an interrupt controller. I meant you didn'
It probably makes more sense to add a timer section and put the CLNIT there instead of forcing it into the interrupt controller section, when it isn't really an interrupt controller. I meant you didn'
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Alistair Francis
· #959
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[PATCH v4 1/2] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform
I agree, but if this is included inside a system controller (as mtime and mtimecmp sometimes are) I'm worried that HW vendors will then just put them next to each other to condense the address space a
I agree, but if this is included inside a system controller (as mtime and mtimecmp sometimes are) I'm worried that HW vendors will then just put them next to each other to condense the address space a
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Alistair Francis
· #956
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[PATCH v4 1/2] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform
I don't think this is a contrast to the PLIC, it's just a different functionality. I'm also not sure the CLINT should be in the interrupt controller section. It is the Core Local INTerruptor (CLINT),
I don't think this is a contrast to the PLIC, it's just a different functionality. I'm also not sure the CLINT should be in the interrupt controller section. It is the Core Local INTerruptor (CLINT),
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Alistair Francis
· #954
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[PATCH V3 1/2] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform
But we don't want it required in the next one either. The idea is to allow vendors to be flexible and share IP between their current ISA offering and thir RISC-V chips. Look at the latest Espressif RI
But we don't want it required in the next one either. The idea is to allow vendors to be flexible and share IP between their current ISA offering and thir RISC-V chips. Look at the latest Espressif RI
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Alistair Francis
· #906
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[PATCH V3 1/2] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform
Why are we removing recommendations? For the embedded spec we don't want to force vendors to meet certain requirements if they have a good reason not to. For example if they share IP or memory maps ac
Why are we removing recommendations? For the embedded spec we don't want to force vendors to meet certain requirements if they have a good reason not to. For example if they share IP or memory maps ac
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Alistair Francis
· #903
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[PATCH V3 1/2] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform
We shouldn't be requiring a CLINT for embedded systems. That is too strenuous of a requirement. Instead I think we should leave the embedded section as is as it maps the register layout in memory. Thi
We shouldn't be requiring a CLINT for embedded systems. That is too strenuous of a requirement. Instead I think we should leave the embedded section as is as it maps the register layout in memory. Thi
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By
Alistair Francis
· #902
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[PATCH] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform
Is the CLINT also deprecated? From what I can tell in the AIA spec it doesn't include a replacement for the CLINT. What should be used for mtime/mtimecmp instead? Alistair
Is the CLINT also deprecated? From what I can tell in the AIA spec it doesn't include a replacement for the CLINT. What should be used for mtime/mtimecmp instead? Alistair
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By
Alistair Francis
· #851
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[PULL 0/3] Initial PR for the Embedded-2022 spec
Ping! >
By
Alistair Francis
· #741
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[PATCH v1 2/2] Section 3.1.4 System Peripherals.
Isn't this the Linux and other Rich OS spec though? Alistair
Isn't this the Linux and other Rich OS spec though? Alistair
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By
Alistair Francis
· #718
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[PULL 3/3] contributors: Add myself as a contributor
Signed-off-by: Alistair Francis <alistair.francis@...> Reviewed-by: Sunil V L <sunilvl@...> --- contributors.adoc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/c
Signed-off-by: Alistair Francis <alistair.francis@...> Reviewed-by: Sunil V L <sunilvl@...> --- contributors.adoc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/c
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By
Alistair Francis
· #698
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[PULL 2/3] riscv-platform-spec: Initial commit of the Embedded-2022 spec
This is the initial attempt at writing an Embedded-2022 specification. This includes some required and recommended components to ease software development and porting while not being too burdensome on
This is the initial attempt at writing an Embedded-2022 specification. This includes some required and recommended components to ease software development and porting while not being too burdensome on
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By
Alistair Francis
· #697
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