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[PATCH 3/4] sbi: Specify the instruction set
This is perhaps obvious, but should be stated explicitly. In particular,
this specification extends the instruction set by specifying particular
behavior for the `ebreak` instruction. If underspecifying this area is
desired (e.g. to only specify the ISA in the unix platform spec), then
this patch can be dropped.
Signed-off-by: Sean Anderson <seanga2@...>
riscv-sbi.adoc | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/riscv-sbi.adoc b/riscv-sbi.adoc
index d2e28f0..d8cba88 100644
@@ -51,6 +51,11 @@ which can be managed or queried are also valid. The set of harts which can be
managed or queried may change over time. Valid **hartid**s should correspond to
the value of the `mhartid` CSR on particular harts.
+== Instruction Set
+All harts in the execution environment must comply with the
+link:https://riscv.org/technical/specifications/[RISC-V ISA specification].
== Binary Encoding
All SBI functions share a single binary encoding, which facilitates the mixing
On Thu, 2020-10-22 at 19:35 -0400, Sean Anderson wrote:
This is perhaps obvious, but should be stated explicitly. InI am fine with either way.
Signed-off-by: Sean Anderson <seanga2@...>--
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