|
On Thu, Jul 15, 2021 at 4:45 PM Kumar Sankaran < ksankaran@...> wrote: Greg, The patch has already been merged. Can you please keep track of the movement of this text to elsewhere?
I was already planning to, so definitely yes.
Greg
|
|
|
Kumar Sankaran
Greg, The patch has already been merged. Can you please keep track of the movement of this text to elsewhere? Regards Kumar
From: Greg Favor <gfavor@...>
Sent: Thursday, July 15, 2021 3:58 PM
To: Andrew Waterman <andrew@...>
Cc: Atish Patra <Atish.Patra@...>; ksankaran@...; tech-unixplatformspec@...
Subject: Re: [RISC-V] [tech-unixplatformspec] [PATCH v2 2/3] Remove the old descriptions from user-level.adoc On Thu, Jul 15, 2021 at 3:06 PM Andrew Waterman <andrew@...> wrote: Yeah, that’s fine by me, too.
Meaning let the patch go forward since I'll be keeping track of this movement of text to elsewhere?
|
|
|
On Thu, Jul 15, 2021 at 3:06 PM Andrew Waterman < andrew@...> wrote: Yeah, that’s fine by me, too.
Meaning let the patch go forward since I'll be keeping track of this movement of text to elsewhere?
Greg
|
|
|
On Thu, Jul 15, 2021 at 4:55 PM Greg Favor < gfavor@...> wrote: Once the RVA22 profile spec is finalized and turned into a spec document, then that is what the platform spec will (and can for now) refer to. In the meantime, it is still in process of being created and hence Andrew's request to wait until there is a document that the text can be moved into (whether that document or somewhere else).
Although I'm willing to print out that patch and add it to my small and growing pile of such outstanding things that need to properly get added into one of the ISA/profile/platform specs - if Andrew is OK with that. (And I'll do that in any case.) Otherwise keep that PR outstanding.
Yeah, that’s fine by me, too.
On Thu, 2021-07-15 at 15:54 -0500, Andrew Waterman wrote:
> Please do not remove these until they have been added to the
> appropriate place. They need to be written somewhere, and I am
> worried about them getting lost (or, worse, pointlessly argued over
> again when someone tries to re-add them).
I thought it is already decided that it will be part of the RVA22
profile spec. It seems that it is not yet added to the RVA22 profile
spec.
Is there a draft version of the RVA22 profile spec that we can refer to
avoid this in future?
>
> On Thu, Jul 15, 2021 at 1:24 AM Atish Patra <atish.patra@...>
> wrote:
> > The first three details belong to a profile specification rather
> > than
> >
> > platform spec. Remove those so that it can be included in the
> > profile.
> >
> >
> >
> > The last remaining one belongs to platform spec but must be merged
> > to
> >
> > the main specification document which will be done later.
> >
> >
> >
> > Signed-off-by: Atish Patra <atish.patra@...>
> >
> > ---
> >
> > user-level.adoc | 6 ------
> >
> > 1 file changed, 6 deletions(-)
> >
> >
> >
> > diff --git a/user-level.adoc b/user-level.adoc
> >
> > index c02f852036c8..2742d98acaac 100644
> >
> > --- a/user-level.adoc
> >
> > +++ b/user-level.adoc
> >
> > @@ -7,12 +7,6 @@
> >
> >
> >
> > ## User-Level Platform
> >
> >
> >
> > -* User-mode environments must implement at least version 2.2 of
> > the
> > RISC-V User
> >
> > - ISA specification, which can be found at
> >
> > -
> > https://github.com/riscv/riscv-isa-manual/blob/master/release/riscv-spec-v2.2.pdf
> > .
> >
> > -* User-mode programs may not execute the `fence.i` instruction.
> >
> > -* User-mode environments may provide additional ISA extensions,
> > but
> > if those
> >
> > - extensions add user-visible state they must be initially
> > disabled.
> >
> > * Within main-memory regions, aligned instruction fetch must be
> > atomic, up to
> >
> > the smaller of ILEN and XLEN bits. In particular, if an aligned
> > 4-byte word
> >
> > is stored with the `sw` instruction, then any processor attempts
> > to execute
> >
--
Regards,
Atish
|
|
|
Once the RVA22 profile spec is finalized and turned into a spec document, then that is what the platform spec will (and can for now) refer to. In the meantime, it is still in process of being created and hence Andrew's request to wait until there is a document that the text can be moved into (whether that document or somewhere else).
Although I'm willing to print out that patch and add it to my small and growing pile of such outstanding things that need to properly get added into one of the ISA/profile/platform specs - if Andrew is OK with that. (And I'll do that in any case.) Otherwise keep that PR outstanding.
Greg
On Thu, 2021-07-15 at 15:54 -0500, Andrew Waterman wrote:
> Please do not remove these until they have been added to the
> appropriate place. They need to be written somewhere, and I am
> worried about them getting lost (or, worse, pointlessly argued over
> again when someone tries to re-add them).
I thought it is already decided that it will be part of the RVA22
profile spec. It seems that it is not yet added to the RVA22 profile
spec.
Is there a draft version of the RVA22 profile spec that we can refer to
avoid this in future?
>
> On Thu, Jul 15, 2021 at 1:24 AM Atish Patra <atish.patra@...>
> wrote:
> > The first three details belong to a profile specification rather
> > than
> >
> > platform spec. Remove those so that it can be included in the
> > profile.
> >
> >
> >
> > The last remaining one belongs to platform spec but must be merged
> > to
> >
> > the main specification document which will be done later.
> >
> >
> >
> > Signed-off-by: Atish Patra <atish.patra@...>
> >
> > ---
> >
> > user-level.adoc | 6 ------
> >
> > 1 file changed, 6 deletions(-)
> >
> >
> >
> > diff --git a/user-level.adoc b/user-level.adoc
> >
> > index c02f852036c8..2742d98acaac 100644
> >
> > --- a/user-level.adoc
> >
> > +++ b/user-level.adoc
> >
> > @@ -7,12 +7,6 @@
> >
> >
> >
> > ## User-Level Platform
> >
> >
> >
> > -* User-mode environments must implement at least version 2.2 of
> > the
> > RISC-V User
> >
> > - ISA specification, which can be found at
> >
> > -
> > https://github.com/riscv/riscv-isa-manual/blob/master/release/riscv-spec-v2.2.pdf
> > .
> >
> > -* User-mode programs may not execute the `fence.i` instruction.
> >
> > -* User-mode environments may provide additional ISA extensions,
> > but
> > if those
> >
> > - extensions add user-visible state they must be initially
> > disabled.
> >
> > * Within main-memory regions, aligned instruction fetch must be
> > atomic, up to
> >
> > the smaller of ILEN and XLEN bits. In particular, if an aligned
> > 4-byte word
> >
> > is stored with the `sw` instruction, then any processor attempts
> > to execute
> >
--
Regards,
Atish
|
|
|
On Thu, 2021-07-15 at 15:54 -0500, Andrew Waterman wrote: Please do not remove these until they have been added to the
appropriate place. They need to be written somewhere, and I am
worried about them getting lost (or, worse, pointlessly argued over
again when someone tries to re-add them). I thought it is already decided that it will be part of the RVA22 profile spec. It seems that it is not yet added to the RVA22 profile spec. Is there a draft version of the RVA22 profile spec that we can refer to avoid this in future?
On Thu, Jul 15, 2021 at 1:24 AM Atish Patra <atish.patra@...>
wrote:
The first three details belong to a profile specification rather
than
platform spec. Remove those so that it can be included in the
profile.
The last remaining one belongs to platform spec but must be merged
to
the main specification document which will be done later.
Signed-off-by: Atish Patra <atish.patra@...>
---
user-level.adoc | 6 ------
1 file changed, 6 deletions(-)
diff --git a/user-level.adoc b/user-level.adoc
index c02f852036c8..2742d98acaac 100644
--- a/user-level.adoc
+++ b/user-level.adoc
@@ -7,12 +7,6 @@
## User-Level Platform
-* User-mode environments must implement at least version 2.2 of
the
RISC-V User
- ISA specification, which can be found at
-
https://github.com/riscv/riscv-isa-manual/blob/master/release/riscv-spec-v2.2.pdf
.
-* User-mode programs may not execute the `fence.i` instruction.
-* User-mode environments may provide additional ISA extensions,
but
if those
- extensions add user-visible state they must be initially
disabled.
* Within main-memory regions, aligned instruction fetch must be
atomic, up to
the smaller of ILEN and XLEN bits. In particular, if an aligned
4-byte word
is stored with the `sw` instruction, then any processor attempts
to execute
-- Regards, Atish
|
|
|
Please do not remove these until they have been added to the appropriate place. They need to be written somewhere, and I am worried about them getting lost (or, worse, pointlessly argued over again when someone tries to re-add them).
The first three details belong to a profile specification rather than
platform spec. Remove those so that it can be included in the profile.
The last remaining one belongs to platform spec but must be merged to
the main specification document which will be done later.
Signed-off-by: Atish Patra <atish.patra@...>
---
user-level.adoc | 6 ------
1 file changed, 6 deletions(-)
diff --git a/user-level.adoc b/user-level.adoc
index c02f852036c8..2742d98acaac 100644
--- a/user-level.adoc
+++ b/user-level.adoc
@@ -7,12 +7,6 @@
## User-Level Platform
-* User-mode environments must implement at least version 2.2 of the RISC-V User
- ISA specification, which can be found at
- https://github.com/riscv/riscv-isa-manual/blob/master/release/riscv-spec-v2.2.pdf.
-* User-mode programs may not execute the `fence.i` instruction.
-* User-mode environments may provide additional ISA extensions, but if those
- extensions add user-visible state they must be initially disabled.
* Within main-memory regions, aligned instruction fetch must be atomic, up to
the smaller of ILEN and XLEN bits. In particular, if an aligned 4-byte word
is stored with the `sw` instruction, then any processor attempts to execute
--
2.31.1
|
|
|
The first three details belong to a profile specification rather than platform spec. Remove those so that it can be included in the profile. The last remaining one belongs to platform spec but must be merged to the main specification document which will be done later. Signed-off-by: Atish Patra <atish.patra@...> --- user-level.adoc | 6 ------ 1 file changed, 6 deletions(-) diff --git a/user-level.adoc b/user-level.adoc index c02f852036c8..2742d98acaac 100644 --- a/user-level.adoc +++ b/user-level.adoc @@ -7,12 +7,6 @@ ## User-Level Platform -* User-mode environments must implement at least version 2.2 of the RISC-V User - ISA specification, which can be found at - https://github.com/riscv/riscv-isa-manual/blob/master/release/riscv-spec-v2.2.pdf. -* User-mode programs may not execute the `fence.i` instruction. -* User-mode environments may provide additional ISA extensions, but if those - extensions add user-visible state they must be initially disabled. * Within main-memory regions, aligned instruction fetch must be atomic, up to the smaller of ILEN and XLEN bits. In particular, if an aligned 4-byte word is stored with the `sw` instruction, then any processor attempts to execute -- 2.31.1
|
|
|
