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[RISC-V] [tech-debug] gdb needs an sbi extension
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You're right. There is a proposal at https://lists.riscv.org/g/sig-hypervisors/message/151 that will likely be implemented by Syntacore before the end of the year.
On Tue, Sep 27, 2022 at 10:54 AM merle w <merlew4n6@...> wrote:
To implement hardware breakpoints and watchpoints on the riscv, the trigger in M
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