[PATCH] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform



I’d like to clearly state that SiFive’s CLINT spec was always meant to be in the public domain, and I’m explicitly and officially affirming that it is.

If you produce a derivative spec from ours, I’ll also immediately affirm that it’s in the public domain.


On Thu, May 6, 2021 at 2:13 AM Anup Patel <anup.patel@...> wrote:

Hi Greg,


Refer Chapter9 of



Refer Chapter11 of






From: Greg Favor <gfavor@...>

Sent: 06 May 2021 12:51

To: Anup Patel <Anup.Patel@...>

Cc: Jonathan Behrens <behrensj@...>; Sunil V L <sunilvl@...>; Abner Chang <renba.chang@...>; tech-unixplatformspec@...; Chang, Abner <abner.chang@...>; Alistair Francis <Alistair.Francis@...>

Subject: Re: [RISC-V] [tech-unixplatformspec] [PATCH] riscv-platform-spec: PLIC and CLINT for Linux-2022 platform


On Wed, May 5, 2021 at 8:45 PM Anup Patel <Anup.Patel@...> wrote:

I suggest we have dedicated RISC-V M-mode timer chapter in the RISC-V platform spec (or a separate specification). This chapter will describe a M-mode timer device with memory mapped

mtime and mtimecmp registers which complies with “3.1.10 Machine Timer Registers” of the RISC-V privilege specification. We can align the M-mode timer device with CLINT, where mtime register is at 0x4000 offset and per-HART mtimecmp registers start at 0xbff8



I completely agree.  This can be a short and simple resolution to the problem.


Anup, could you send a copy of or pointer to a suitable version of a CLINT spec?