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[PATCH] riscv-platform-spec: ACPI for OS-A Base Spec
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ACPI Requirement for OS-A Base Discovery mechanism.
This requirement adds ACPI as an choice for discovery mechanism which
firmware can implement.
In case the firmware supports both Devicetree and ACPI, firmware must
ensure that only one of the mechanism is loaded in memory and provided
to OS at any given time.
For RISC-V there are required tables of SMBIOS which are required along
with ACPI and they are also added as requirement.
Signed-off-by: Rahul Pathak <rpathak@...>
riscv-platform-spec.adoc | 82 +++++++++++++++++++++++++++++++++++++++-
1 file changed, 81 insertions(+), 1 deletion(-)
diff --git a/riscv-platform-spec.adoc b/riscv-platform-spec.adoc
index 4c356b8..708b48c 100644
@@ -257,8 +257,88 @@ mentioned in the requirements.
- MBR support is not required
===== Discovery Mechanisms
-- Device Tree (DT) is the required mechanism for system description.
- Compliance with the System Description Specification is required – TBD
+- Platforms must implement atleast one of the choices below -
+ * Devicetree
+ * ACPI and SMBIOS, only if platform implements AIA APLIC with AIA IMSIC for
+ interrupts. Refer Interrupt Controller chapter for details.
+- Firmware may support both Devicetree and ACPI but only one of them must be
+provided to the OS.
+If the firmware implements ACPI as discovery mechanism then ACPI tables can be
+passed via UEFI to the operating system. This section defines the required ACPI
+tables and objects. All other ACPI tables for RISC-V can be implemented as
+needed adhering to the ACPI spec version 6.4+(RISC-V support when added).
+In ACPI namespace, processors are required to be defined under the System Bus
+*(\_SB)* name space.
+The required ACPI System Description Tables, Device Objects and Methods are
+.Required ACPI System Description Tables
+[cols="3,1,2", width=95%, align="center", options="header"]
+|ACPI Table |ACPI 6.4+ $|Note
+|Root System Description Pointer (RSDP) |5.2.5 |
+|Extended System Description Table (XSDT) |5.2.8 |
+|Fixed ACPI Description Table (FADT) |5.2.9 |
+|Differentiated System Description Table (DSDT)|22.214.171.124 |
+|Multiple APIC Description Table (MADT) |5.2.12 |*TBD*: Need ECR
+ to add
+ APLIC & IMSIC
+ (AIA) to MADT
+|RISC-V Timer Description Table |New |*TBD*: _DSD to
+|Processor Properties Topology Table (PPTT) |5.2.29 |CPU/Cache topology
+|Debug Port Table 2 (DBG2) |Microsoft |*TBD*: 16550D?
+|Serial Port Console Redirection (SPCR) |Microsoft |*TBD*: 16550D?
+|PMU event mapping table |New |*TBD*: New table
+.Required Device Objects and Methods
+[cols="1,2,3", width=95%, align="center", options="header"]
+|Object/Method | ACPI 6.4+ $ | Note
+|_AEI | 126.96.36.199 | Required for GPIO-signalled events.
+|_EVT | 188.8.131.52 | Required for interrupt-signalled events.
+|_HID | 6.1.5 |
+|_UID | 6.1.12 |
+|_CRS | 6.2.2 |
+|_CCA | 6.2.17 | Required for DMA capable devices
+|_STA | 6.3.7/7.2.4 | Device status
+The System Management BIOS (SMBIOS) records provide basic hardware and
+firmware configuration information used widely by the platform management
+The SMBIOS table is identified using *SMBIOS3_TABLE_GUID* in UEFI configuration
+table. The memory type used for the SMBIOS table is required to be of type
+In addition to the conformance guidelines as mentioned in *ANNEX A / 6.2* of
+the SMBIOS specification 3.4.0, below additional structures are required.
+.Required SMBIOS structures
+[cols="4,1,2", width=95%, align="center", options="header"]
+|Structure Type | SMBIOS 3.4.0 $ | Note
+|Processor Additional Information (Type 44) | 7.45 | This
+structure provides the additional information of RISC-V processor
+characteristics and HART hardware features discovered during the firmware boot
==== Runtime Services
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