The first three details belong to a profile specification rather than

platform spec. Remove those so that it can be included in the profile.



The last remaining one belongs to platform spec but must be merged to

the main specification document which will be done later.



Signed-off-by: Atish Patra <atish.patra@...>

---

 user-level.adoc | 6 ------

 1 file changed, 6 deletions(-)



diff --git a/user-level.adoc b/user-level.adoc

index c02f852036c8..2742d98acaac 100644

--- a/user-level.adoc

+++ b/user-level.adoc

@@ -7,12 +7,6 @@



 ## User-Level Platform



-* User-mode environments must implement at least version 2.2 of the RISC-V User

-  ISA specification, which can be found at

-  https://github.com/riscv/riscv-isa-manual/blob/master/release/riscv-spec-v2.2.pdf. 

-* User-mode programs may not execute the `fence.i` instruction.

-* User-mode environments may provide additional ISA extensions, but if those

-  extensions add user-visible state they must be initially disabled.

 * Within main-memory regions, aligned instruction fetch must be atomic, up to

   the smaller of ILEN and XLEN bits.  In particular, if an aligned 4-byte word

   is stored with the `sw` instruction, then any processor attempts to execute

--

2.31.1

On Thu, 2021-07-15 at 15:54 -0500, Andrew Waterman wrote:
> Please do not remove these until they have been added to the
> appropriate place. They need to be written somewhere, and I am
> worried about them getting lost (or, worse, pointlessly argued over
> again when someone tries to re-add them).

I thought it is already decided that it will be part of the RVA22
profile spec. It seems that it is not yet added to the RVA22 profile
spec.

Is there a draft version of the RVA22 profile spec that we can refer to
avoid this in future?

>
> On Thu, Jul 15, 2021 at 1:24 AM Atish Patra <atish.patra@...>
> wrote:
> > The first three details belong to a profile specification rather
> > than
> >
> > platform spec. Remove those so that it can be included in the
> > profile.
> >
> >
> >
> > The last remaining one belongs to platform spec but must be merged
> > to
> >
> > the main specification document which will be done later.
> >
> >
> >
> > Signed-off-by: Atish Patra <atish.patra@...>
> >
> > ---
> >
> >  user-level.adoc | 6 ------
> >
> >  1 file changed, 6 deletions(-)
> >
> >
> >
> > diff --git a/user-level.adoc b/user-level.adoc
> >
> > index c02f852036c8..2742d98acaac 100644
> >
> > --- a/user-level.adoc
> >
> > +++ b/user-level.adoc
> >
> > @@ -7,12 +7,6 @@
> >
> >
> >
> >  ## User-Level Platform
> >
> >
> >
> > -* User-mode environments must implement at least version 2.2 of
> > the
> > RISC-V User
> >
> > -  ISA specification, which can be found at
> >
> > - 
> > https://github.com/riscv/riscv-isa-manual/blob/master/release/riscv-spec-v2.2.pdf
> > . 
> >
> > -* User-mode programs may not execute the `fence.i` instruction.
> >
> > -* User-mode environments may provide additional ISA extensions,
> > but
> > if those
> >
> > -  extensions add user-visible state they must be initially
> > disabled.
> >
> >  * Within main-memory regions, aligned instruction fetch must be
> > atomic, up to
> >
> >    the smaller of ILEN and XLEN bits.  In particular, if an aligned
> > 4-byte word
> >
> >    is stored with the `sw` instruction, then any processor attempts
> > to execute
> >

--
Regards,
Atish