Hi All, We don't have a dedicated RISC-V PMU extension but we do have HARDWARE performance counters such as CYCLE CSR, INSTRET CSR, and HPMCOUNTER CSRs. A RISC-V implementation can support monitoring

Hi All, We don't have a dedicated RISC-V PMU extension but we do have HARDWARE performance counters such as CYCLE CSR, INSTRET CSR, and HPMCOUNTER CSRs. A RISC-V implementation can support monitoring

Thanks, Mark. This is very helpful. Krste, it would be good to get your take on Profiles as well. Arun From: <software@...> on behalf of mark <markhimelstein@...> Date: Thursday, July 30, 2020 at 10:2

I'm resigning from my posts at the RISC-V Foundation (vice chair of the software standing committee and chair of the UNIX platform specification working group). I know it might seem a bit sudden, but

Indeed, it was great working with you, and you will be missed. Thank you for all your hard work and know you’re always welcome in the RISC-V community! All the best, Stephano -- Stephano Cetola Progra

Hi All, We don't have a dedicated RISC-V PMU extension for all privilege modes but we do have M-mode HARDWARE performance counters such as MCYCLE CSR, MINSTRET CSR, and MHPMCOUNTER CSRs which are read

Hi All, The next Unix platform specification working group meeting is scheduled on next Thursday(20th Aug 2020) at 8AM PST. Agenda: * SBI PMU specification discussion https://lists.riscv.org/g/tech-un

Hi All, We don't have a dedicated RISC-V PMU extension for all privilege modes but we do have M-mode HARDWARE performance counters such as MCYCLE CSR, MINSTRET CSR, and MHPMCOUNTER CSRs which are read

Hi all, The TSC has approved Al Stone as UNIX Platform Task Group Chair just in time for today’s meeting. Congrats, Al. It’s great to have you on board. Best, Arun Notice: This email and any attachmen

[Adding Software and Platform] I agree the Profiles TG will need to work closely with the Config and Platform TGs. Mark, I think it might be helpful if you (and maybe Krste also) could create a short

Thanks. I think :). As a very first step, does there currently exist an approved charter and/or plan for the UNIX platform task group? There's a very brief statement in the member's area of riscv.org:

You have been invited to the following event. Unix platform specification working group meeting When Every 2 weeks from 8am to 9am on Thursday from Thu Sep 10 to Thu Dec 10 Pacific Time - Los Angeles

Hi All, Quite a few organizations are working on implementing RISC-V H-extension. I suggest to have a regular RISC-V Hypervisor Sync-up Call to: 1) Coordinate RISC-V hypervisor software efforts so tha

I thought the major issue with #1 was how to keep PTE based attributes isynchronized with M-code on the same hart running in bare mode that has no PTE bits to look at and might access without knowledg

(I’m new to this email alias so I may be missing the context of past discussions. I apologize up front if I’m rehashing past discussions.) My preference would be Option #1 since I’m familiar with impl

To all the system software people on the tech-unixplatformspec and software email lists: The tech-virt-mem Task Group is considering two alternative approaches for specifying address/page-based attrib

Hi All, Two solutions were discussed at LPC2020 for RISC-V S-mode system reset mechanism. (Slides, https://linuxplumbersconf.org/event/7/contributions/810/attachments/631/1144/RISCV_EBBR_lpc2020.pdf)

Here's the proposed agenda for the upcoming meeting of the Platform Spec Working Group. If there's something you'd like to add, just let me know now or during the meeting. Please note, too, that I'm s

-- Do not delete or change any of the following text. -- Options to Join this Meeting From any computer or mobile device, Click to Join WebEx. From any video conference unit, enter "54 171 884 1130" f

Hi, tech-unixplatformspec@..., Atish Patra changed the WebEx meeting information. RISC-V Hypervisor Sync-up Call Occurs every 2 week(s) on Tuesday effective Tuesday, September 29, 2020 until Tuesday,